From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 53738 invoked by alias); 24 May 2016 08:24:30 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 53483 invoked by uid 89); 24 May 2016 08:24:29 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=BAYES_00,KAM_LAZY_DOMAIN_SECURITY autolearn=no version=3.3.2 spammy=4653, 4656, HX-HELO:eggs.gnu.org, Hx-spam-relays-external:208.118.235.92 X-HELO: eggs.gnu.org Received: from eggs.gnu.org (HELO eggs.gnu.org) (208.118.235.92) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Tue, 24 May 2016 08:24:15 +0000 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b57dE-00010a-O3 for gcc-patches@gcc.gnu.org; Tue, 24 May 2016 04:24:09 -0400 Received: from foss.arm.com ([217.140.101.70]:54210) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b57dE-0000yf-FW for gcc-patches@gcc.gnu.org; Tue, 24 May 2016 04:24:04 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EA14A30B for ; Tue, 24 May 2016 01:24:22 -0700 (PDT) Received: from [10.2.206.198] (e104437-lin.cambridge.arm.com [10.2.206.198]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E81133F5C4 for ; Tue, 24 May 2016 01:23:59 -0700 (PDT) From: Jiong Wang Subject: [AArch64, 5/6] Reimplement fabd intrinsics & merge rtl patterns To: GCC Patches References: <57430251.6060902@foss.arm.com> <57430271.3070504@foss.arm.com> <5743029C.60208@foss.arm.com> <574302DA.6090803@foss.arm.com> <574302FC.5050701@foss.arm.com> Message-ID: <57440F9E.6040807@foss.arm.com> Date: Tue, 24 May 2016 08:24:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.7.2 MIME-Version: 1.0 In-Reply-To: <574302FC.5050701@foss.arm.com> Content-Type: multipart/mixed; boundary="------------030904040605090408060807" X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 217.140.101.70 X-IsSubscribed: yes X-SW-Source: 2016-05/txt/msg01862.txt.bz2 This is a multi-part message in MIME format. --------------030904040605090408060807 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-length: 775 These intrinsics were implemented before "fabd_3" introduces. Meanwhile the patterns "fabd_3" and "*fabd_scalar3" can be merged into a single "fabd3" using VALLF. This patch migrate the implementation to builtins backed by this pattern. gcc/ 2016-05-23 Jiong Wang * config/aarch64/aarch64-builtins.def (fabd): New builtins for modes VALLF. * config/aarch64/aarch64-simd.md (fabd_3): Extend modes from VDQF to VALLF. "*fabd_scalar3): Delete. * config/aarch64/arm_neon.h (vabds_f32): Remove inline assembly. Use builtin. (vabdd_f64): Likewise. (vabd_f32): Likewise. (vabdq_f32): Likewise. (vabdq_f64): Likewise. --------------030904040605090408060807 Content-Type: text/x-patch; name="0005-5.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="0005-5.patch" Content-length: 5616 >From 9bafb58055d4e379df7b626acd6aa80bdb0d4b22 Mon Sep 17 00:00:00 2001 From: "Jiong.Wang" Date: Mon, 23 May 2016 12:12:53 +0100 Subject: [PATCH 5/6] 5 --- gcc/config/aarch64/aarch64-builtins.def | 3 ++ gcc/config/aarch64/aarch64-simd.md | 23 +++------ gcc/config/aarch64/arm_neon.h | 87 ++++++++++++--------------------- 3 files changed, 42 insertions(+), 71 deletions(-) diff --git a/gcc/config/aarch64/aarch64-builtins.def b/gcc/config/aarch64/aarch64-builtins.def index 1955d17..40baebe 100644 --- a/gcc/config/aarch64/aarch64-builtins.def +++ b/gcc/config/aarch64/aarch64-builtins.def @@ -465,3 +465,6 @@ /* Implemented by aarch64_rsqrts. */ BUILTIN_VALLF (BINOP, rsqrts, 0) + + /* Implemented by fabd_3. */ + BUILTIN_VALLF (BINOP, fabd, 3) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index cca6c1b..71dd74a 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -474,23 +474,14 @@ [(set_attr "type" "neon_arith_acc")] ) -(define_insn "fabd_3" - [(set (match_operand:VDQF 0 "register_operand" "=w") - (abs:VDQF (minus:VDQF - (match_operand:VDQF 1 "register_operand" "w") - (match_operand:VDQF 2 "register_operand" "w"))))] - "TARGET_SIMD" - "fabd\t%0., %1., %2." - [(set_attr "type" "neon_fp_abd_")] -) - -(define_insn "*fabd_scalar3" - [(set (match_operand:GPF 0 "register_operand" "=w") - (abs:GPF (minus:GPF - (match_operand:GPF 1 "register_operand" "w") - (match_operand:GPF 2 "register_operand" "w"))))] +(define_insn "fabd3" + [(set (match_operand:VALLF 0 "register_operand" "=w") + (abs:VALLF + (minus:VALLF + (match_operand:VALLF 1 "register_operand" "w") + (match_operand:VALLF 2 "register_operand" "w"))))] "TARGET_SIMD" - "fabd\t%0, %1, %2" + "fabd\t%0, %1, %2" [(set_attr "type" "neon_fp_abd_")] ) diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index 9bbe815..ca29074 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -5440,17 +5440,6 @@ vabaq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c) return result; } -__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) -vabd_f32 (float32x2_t a, float32x2_t b) -{ - float32x2_t result; - __asm__ ("fabd %0.2s, %1.2s, %2.2s" - : "=w"(result) - : "w"(a), "w"(b) - : /* No clobbers */); - return result; -} - __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) vabd_s8 (int8x8_t a, int8x8_t b) { @@ -5517,17 +5506,6 @@ vabd_u32 (uint32x2_t a, uint32x2_t b) return result; } -__extension__ static __inline float64_t __attribute__ ((__always_inline__)) -vabdd_f64 (float64_t a, float64_t b) -{ - float64_t result; - __asm__ ("fabd %d0, %d1, %d2" - : "=w"(result) - : "w"(a), "w"(b) - : /* No clobbers */); - return result; -} - __extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) vabdl_high_s8 (int8x16_t a, int8x16_t b) { @@ -5660,28 +5638,6 @@ vabdl_u32 (uint32x2_t a, uint32x2_t b) return result; } -__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) -vabdq_f32 (float32x4_t a, float32x4_t b) -{ - float32x4_t result; - __asm__ ("fabd %0.4s, %1.4s, %2.4s" - : "=w"(result) - : "w"(a), "w"(b) - : /* No clobbers */); - return result; -} - -__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) -vabdq_f64 (float64x2_t a, float64x2_t b) -{ - float64x2_t result; - __asm__ ("fabd %0.2d, %1.2d, %2.2d" - : "=w"(result) - : "w"(a), "w"(b) - : /* No clobbers */); - return result; -} - __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) vabdq_s8 (int8x16_t a, int8x16_t b) { @@ -5748,17 +5704,6 @@ vabdq_u32 (uint32x4_t a, uint32x4_t b) return result; } -__extension__ static __inline float32_t __attribute__ ((__always_inline__)) -vabds_f32 (float32_t a, float32_t b) -{ - float32_t result; - __asm__ ("fabd %s0, %s1, %s2" - : "=w"(result) - : "w"(a), "w"(b) - : /* No clobbers */); - return result; -} - __extension__ static __inline int16_t __attribute__ ((__always_inline__)) vaddlv_s8 (int8x8_t a) { @@ -10246,6 +10191,38 @@ vtbx2_p8 (poly8x8_t r, poly8x8x2_t tab, uint8x8_t idx) /* Start of optimal implementations in approved order. */ +/* vabd. */ + +__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +vabds_f32 (float32_t a, float32_t b) +{ + return __builtin_aarch64_fabdsf (a, b); +} + +__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +vabdd_f64 (float64_t a, float64_t b) +{ + return __builtin_aarch64_fabddf (a, b); +} + +__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +vabd_f32 (float32x2_t a, float32x2_t b) +{ + return __builtin_aarch64_fabdv2sf (a, b); +} + +__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +vabdq_f32 (float32x4_t a, float32x4_t b) +{ + return __builtin_aarch64_fabdv4sf (a, b); +} + +__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +vabdq_f64 (float64x2_t a, float64x2_t b) +{ + return __builtin_aarch64_fabdv2df (a, b); +} + /* vabs */ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) -- 1.9.1 --------------030904040605090408060807--