From 770e71af35f6e7f4e78409121e50ffb05a013645 Mon Sep 17 00:00:00 2001 From: Matthew Wahab Date: Wed, 15 Jun 2016 09:20:31 +0100 Subject: [PATCH 2/2] [ARM] Fix, add tests for FP16 aapcs. 2016-06-27 Matthew Wahab * testsuite/gcc.target/arm/aapcs/neon-vect10.c: Require -mfloat-ab=hard. Replace arm_neon_fp16_ok with arm_neon_fp16_hw. * testsuite/gcc.target/arm/aapcs/neon-vect9.c: Likewise. * testsuite/gcc.target/arm/aapcs/vfp18.c: Likewise. * testsuite/gcc.target/arm/aapcs/vfp19.c: Likewise. * testsuite/gcc.target/arm/aapcs/vfp20.c: Likewise. * testsuite/gcc.target/arm/aapcs/vfp21.c: Likewise. * testsuite/gcc.target/arm/fp16-aapcs-1.c: Require -mfloat-ab=hard. Also simplify the test. * testsuite/gcc.target/arm/fp16-aapcs-2.c: New. --- gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c | 3 ++- gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c | 3 ++- gcc/testsuite/gcc.target/arm/aapcs/vfp18.c | 7 ++++--- gcc/testsuite/gcc.target/arm/aapcs/vfp19.c | 9 +++++---- gcc/testsuite/gcc.target/arm/aapcs/vfp20.c | 9 +++++---- gcc/testsuite/gcc.target/arm/aapcs/vfp21.c | 9 +++++---- gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c | 24 ++++++++++++++---------- gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c | 21 +++++++++++++++++++++ 8 files changed, 58 insertions(+), 27 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c index 680a3b5..788079b 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c @@ -1,7 +1,8 @@ /* Test AAPCS layout (VFP variant for Neon types) */ /* { dg-do run { target arm_eabi } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_neon_fp16_hw } */ /* { dg-add-options arm_neon_fp16 } */ #ifndef IN_FRAMEWORK diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c index fc2b13b..b42fdd2 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c @@ -1,7 +1,8 @@ /* Test AAPCS layout (VFP variant for Neon types) */ /* { dg-do run { target arm_eabi } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_neon_fp16_hw } */ /* { dg-add-options arm_neon_fp16 } */ #ifndef IN_FRAMEWORK diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c index 225e9ce..0745a82 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c @@ -1,8 +1,9 @@ -/* Test AAPCS layout (VFP variant) */ +/* Test AAPCS layout (VFP variant) */ /* { dg-do run { target arm_eabi } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ -/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_fp16_hw } */ +/* { dg-add-options arm_fp16_ieee } */ #ifndef IN_FRAMEWORK #define VFP diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c index 8928b15..950c1f6 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c @@ -1,8 +1,9 @@ -/* Test AAPCS layout (VFP variant) */ +/* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm_eabi } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ -/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */ +/* { dg-do run { target arm_eabi } } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_fp16_hw } */ +/* { dg-add-options arm_fp16_ieee } */ #ifndef IN_FRAMEWORK #define VFP diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c index 61f0704..f898d4c 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c @@ -1,8 +1,9 @@ -/* Test AAPCS layout (VFP variant) */ +/* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm_eabi } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ -/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */ +/* { dg-do run { target arm_eabi } } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_fp16_hw } */ +/* { dg-add-options arm_fp16_ieee } */ #ifndef IN_FRAMEWORK #define VFP diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c index 15dff7d..48bb598 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c @@ -1,8 +1,9 @@ -/* Test AAPCS layout (VFP variant) */ +/* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm_eabi } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ -/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */ +/* { dg-do run { target arm_eabi } } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_fp16_hw } */ +/* { dg-add-options arm_fp16_ieee } */ #ifndef IN_FRAMEWORK #define VFP diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c index 5eab3e2..9bf3fc0 100644 --- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c +++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c @@ -1,17 +1,21 @@ /* { dg-do compile } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm_fp16_ok } */ -/* { dg-options "-mfp16-format=ieee -O2" } */ -/* { dg-add-options arm_fp16 } */ +/* { dg-options "-O2" } */ +/* { dg-add-options arm_fp16_ieee } */ -/* Test __fp16 arguments and return value in registers. */ +/* Test __fp16 arguments and return value in registers (hard-float). */ -__fp16 F (__fp16 a, __fp16 b, __fp16 c) +void +swap (__fp16, __fp16); + +__fp16 +F (__fp16 a, __fp16 b, __fp16 c) { - if (a == b) - return c; - return a; + swap (b, a); + return c; } -/* { dg-final { scan-assembler-times {vcvtb\.f32\.f16\ts[0-9]+, s0} 1 } } */ -/* { dg-final { scan-assembler-times {vcvtb\.f32\.f16\ts[0-9]+, s1} 1 } } */ -/* { dg-final { scan-assembler-times {vmov\ts0, r[0-9]+} 1 } } */ +/* { dg-final { scan-assembler-times {vmov\tr[0-9]+, s[0-2]} 2 } } */ +/* { dg-final { scan-assembler-times {vmov.f32\ts1, s0} 1 } } */ +/* { dg-final { scan-assembler-times {vmov\ts0, r[0-9]+} 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c new file mode 100644 index 0000000..4753e36 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_fp16_ok } */ +/* { dg-options "-mfloat-abi=softfp -O2" } */ +/* { dg-add-options arm_fp16_ieee } */ +/* { dg-skip-if "incompatible float-abi" { arm*-*-* } { "-mfloat-abi=hard" } } */ + +/* Test __fp16 arguments and return value in registers (softfp). */ + +void +swap (__fp16, __fp16); + +__fp16 +F (__fp16 a, __fp16 b, __fp16 c) +{ + swap (b, a); + return c; +} + +/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } } */ +/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } } */ +/* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } } */ -- 2.1.4