From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3639 invoked by alias); 4 Jul 2016 13:49:48 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 3625 invoked by uid 89); 4 Jul 2016 13:49:47 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=istarget, sk:__arm_f, sk:__ARM_F, clobbers X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 04 Jul 2016 13:49:34 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 938AD28 for ; Mon, 4 Jul 2016 06:50:30 -0700 (PDT) Received: from [10.2.206.222] (e108033-lin.cambridge.arm.com [10.2.206.222]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 06E343F41F for ; Mon, 4 Jul 2016 06:49:32 -0700 (PDT) Subject: Re: [PATCH 3/17][Testsuite] Add ARM support for ARMv8.2-A with FP16 arithmetic instructions. To: gcc-patches@gcc.gnu.org References: <573B28A3.9030603@foss.arm.com> <573B2A18.8060502@foss.arm.com> From: Matthew Wahab Message-ID: <577A696B.5050005@foss.arm.com> Date: Mon, 04 Jul 2016 13:49:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <573B2A18.8060502@foss.arm.com> Content-Type: multipart/mixed; boundary="------------010405000508080401050604" X-IsSubscribed: yes X-SW-Source: 2016-07/txt/msg00121.txt.bz2 This is a multi-part message in MIME format. --------------010405000508080401050604 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-length: 1557 On 17/05/16 15:26, Matthew Wahab wrote: > The ARMv8.2-A FP16 extension adds to both the VFP and the NEON > instruction sets. This patch adds support to the testsuite to select > targets and set options for tests that make use of these > instructions. It also adds documentation for ARMv8.1-A selectors. This is a rebase of the patch to take account of changes in sourcebuild.texi. Tested the series for arm-none-linux-gnueabihf with native bootstrap and make check and for arm-none-eabi and armeb-none-eabi with make check on an ARMv8.2-A emulator. 2016-07-04 Matthew Wahab * doc/sourcebuild.texi (ARM-specific attributes): Add anchor for arm_v8_1a_neon_ok. Add entries for arm_v8_2a_fp16_scalar_ok, arm_v8_2a_fp16_scalar_hw, arm_v8_2a_fp16_neon_ok and arm_v8_2a_fp16_neon_hw. (Add options): Add entries for arm_v8_1a_neon, arm_v8_2a_fp16_scalar, arm_v8_2a_fp16_neon. * lib/target-supports.exp (add_options_for_arm_v8_2a_fp16_scalar): New. (add_options_for_arm_v8_2a_fp16_neon): New. (check_effective_target_arm_arch_v8_2a_ok): Auto-generate. (add_options_for_arm_arch_v8_2a): Auto-generate. (check_effective_target_arm_arch_v8_2a_multilib): Auto-generate. (check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache): New. (check_effective_target_arm_v8_2a_fp16_scalar_ok): New. (check_effective_target_arm_v8_2a_fp16_neon_ok_nocache): New. (check_effective_target_arm_v8_2a_fp16_neon_ok): New. (check_effective_target_arm_v8_2a_fp16_scalar_hw): New. (check_effective_target_arm_v8_2a_fp16_neon_hw): New. --------------010405000508080401050604 Content-Type: text/x-patch; name="0003-PATCH-3-17-Testsuite-Add-ARM-support-for-ARMv8.2-A-w.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename*0="0003-PATCH-3-17-Testsuite-Add-ARM-support-for-ARMv8.2-A-w.pa"; filename*1="tch" Content-length: 10007 >From 47ead98473ac1f6dda5df2638800e5b4c8ec38a1 Mon Sep 17 00:00:00 2001 From: Matthew Wahab Date: Thu, 7 Apr 2016 13:34:30 +0100 Subject: [PATCH 03/17] [PATCH 3/17][Testsuite] Add ARM support for ARMv8.2-A with FP16 arithmetic instructions. 2016-07-04 Matthew Wahab * doc/sourcebuild.texi (ARM-specific attributes): Add anchor for arm_v8_1a_neon_ok. Add entries for arm_v8_2a_fp16_scalar_ok, arm_v8_2a_fp16_scalar_hw, arm_v8_2a_fp16_neon_ok and arm_v8_2a_fp16_neon_hw. (Add options): Add entries for arm_v8_1a_neon, arm_v8_2a_scalar, arm_v8_2a_neon. * lib/target-supports.exp (add_options_for_arm_v8_2a_fp16_scalar): New. (add_options_for_arm_v8_2a_fp16_neon): New. (check_effective_target_arm_arch_v8_2a_ok): Auto-generate. (add_options_for_arm_arch_v8_2a): Auto-generate. (check_effective_target_arm_arch_v8_2a_multilib): Auto-generate. (check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache): New. (check_effective_target_arm_v8_2a_fp16_scalar_ok): New. (check_effective_target_arm_v8_2a_fp16_neon_ok_nocache): New. (check_effective_target_arm_v8_2a_fp16_neon_ok): New. (check_effective_target_arm_v8_2a_fp16_scalar_hw): New. (check_effective_target_arm_v8_2a_fp16_neon_hw): New. --- gcc/doc/sourcebuild.texi | 40 ++++++++++ gcc/testsuite/lib/target-supports.exp | 145 +++++++++++++++++++++++++++++++++- 2 files changed, 184 insertions(+), 1 deletion(-) diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index 1fa962d..4f83307 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -1596,6 +1596,7 @@ ARM target supports @code{-mfpu=neon-fp-armv8 -mfloat-abi=softfp}. Some multilibs may be incompatible with these options. @item arm_v8_1a_neon_ok +@anchor{arm_v8_1a_neon_ok} ARM target supports options to generate ARMv8.1 Adv.SIMD instructions. Some multilibs may be incompatible with these options. @@ -1607,6 +1608,28 @@ arm_v8_1a_neon_ok. @item arm_acq_rel ARM target supports acquire-release instructions. +@item arm_v8_2a_fp16_scalar_ok +@anchor{arm_v8_2a_fp16_scalar_ok} +ARM target supports options to generate instructions for ARMv8.2 and +scalar instructions from the FP16 extension. Some multilibs may be +incompatible with these options. + +@item arm_v8_2a_fp16_scalar_hw +ARM target supports executing instructions for ARMv8.2 and scalar +instructions from the FP16 extension. Some multilibs may be +incompatible with these options. Implies arm_v8_2a_fp16_neon_ok. + +@item arm_v8_2a_fp16_neon_ok +@anchor{arm_v8_2a_fp16_neon_ok} +ARM target supports options to generate instructions from ARMv8.2 with +the FP16 extension. Some multilibs may be incompatible with these +options. Implies arm_v8_2a_fp16_scalar_ok. + +@item arm_v8_2a_fp16_neon_hw +ARM target supports executing instructions from ARMv8.2 with the FP16 +extension. Some multilibs may be incompatible with these options. +Implies arm_v8_2a_fp16_neon_ok and arm_v8_2a_fp16_scalar_hw. + @item arm_prefer_ldrd_strd ARM target prefers @code{LDRD} and @code{STRD} instructions over @code{LDM} and @code{STM} instructions. @@ -2091,6 +2114,23 @@ the @ref{arm_neon_fp16_ok,,arm_neon_fp16_ok effective target keyword}. arm vfp3 floating point support; see the @ref{arm_vfp3_ok,,arm_vfp3_ok effective target keyword}. +@item arm_v8_1a_neon +Add options for ARMv8.1 with Adv.SIMD support, if this is supported +by the target; see the @ref{arm_v8_1a_neon_ok,,arm_v8_1a_neon_ok} +effective target keyword. + +@item arm_v8_2a_fp16_scalar +Add options for ARMv8.2 with scalar FP16 support, if this is +supported by the target; see the +@ref{arm_v8_2a_fp16_scalar_ok,,arm_v8_2a_fp16_scalar_ok} effective +target keyword. + +@item arm_v8_2a_fp16_neon +Add options for ARMv8.2 with Adv.SIMD FP16 support, if this is +supported by the target; see the +@ref{arm_v8_2a_fp16_neon_ok,,arm_v8_2a_fp16_neon_ok} effective target +keyword. + @item bind_pic_locally Add the target-specific flags needed to enable functions to bind locally when using pic/PIC passes in the testsuite. diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 2ee7fc0..3e914d3 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2974,6 +2974,28 @@ proc add_options_for_arm_v8_1a_neon { flags } { return "$flags $et_arm_v8_1a_neon_flags -march=armv8.1-a" } +# Add the options needed for ARMv8.2 with the scalar FP16 extension. +# Also adds the ARMv8 FP options for ARM. + +proc add_options_for_arm_v8_2a_fp16_scalar { flags } { + if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } { + return "$flags" + } + global et_arm_v8_2a_fp16_scalar_flags + return "$flags $et_arm_v8_2a_fp16_scalar_flags" +} + +# Add the options needed for ARMv8.2 with the FP16 extension. Also adds +# the ARMv8 NEON options for ARM. + +proc add_options_for_arm_v8_2a_fp16_neon { flags } { + if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } { + return "$flags" + } + global et_arm_v8_2a_fp16_neon_flags + return "$flags $et_arm_v8_2a_fp16_neon_flags" +} + proc add_options_for_arm_crc { flags } { if { ! [check_effective_target_arm_crc_ok] } { return "$flags" @@ -3325,7 +3347,8 @@ foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__ v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__ v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__ v8a "-march=armv8-a" __ARM_ARCH_8A__ - v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ } { + v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ + v8_2a "-march=armv8.2a" __ARM_ARCH_8A__ } { eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] { proc check_effective_target_arm_arch_FUNC_ok { } { if { [ string match "*-marm*" "FLAG" ] && @@ -3537,6 +3560,76 @@ proc check_effective_target_arm_v8_1a_neon_ok { } { check_effective_target_arm_v8_1a_neon_ok_nocache] } +# Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic +# instructions, 0 otherwise. The test is valid for ARM. Record the +# command line options needed. + +proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } { + global et_arm_v8_2a_fp16_scalar_flags + set et_arm_v8_2a_fp16_scalar_flags "" + + if { ![istarget arm*-*-*] } { + return 0; + } + + # Iterate through sets of options to find the compiler flags that + # need to be added to the -march option. + foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \ + "-mfpu=fp-armv8 -mfloat-abi=softfp"} { + if { [check_no_compiler_messages_nocache \ + arm_v8_2a_fp16_scalar_ok object { + #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC) + #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined" + #endif + } "$flags -march=armv8.2-a+fp16"] } { + set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16" + return 1 + } + } + + return 0; +} + +proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } { + return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \ + check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache] +} + +# Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic +# instructions, 0 otherwise. The test is valid for ARM. Record the +# command line options needed. + +proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } { + global et_arm_v8_2a_fp16_neon_flags + set et_arm_v8_2a_fp16_neon_flags "" + + if { ![istarget arm*-*-*] } { + return 0; + } + + # Iterate through sets of options to find the compiler flags that + # need to be added to the -march option. + foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \ + "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} { + if { [check_no_compiler_messages_nocache \ + arm_v8_2a_fp16_neon_ok object { + #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) + #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined" + #endif + } "$flags -march=armv8.2-a+fp16"] } { + set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16" + return 1 + } + } + + return 0; +} + +proc check_effective_target_arm_v8_2a_fp16_neon_ok { } { + return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \ + check_effective_target_arm_v8_2a_fp16_neon_ok_nocache] +} + # Return 1 if the target supports executing ARMv8 NEON instructions, 0 # otherwise. @@ -3599,6 +3692,56 @@ proc check_effective_target_arm_v8_1a_neon_hw { } { } [add_options_for_arm_v8_1a_neon ""]] } +# Return 1 if the target supports executing instructions floating point +# instructions from ARMv8.2 with the FP16 extension, 0 otherwise. The +# test is valid for ARM. + +proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } { + if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } { + return 0; + } + return [check_runtime arm_v8_2a_fp16_scalar_hw_available { + int + main (void) + { + __fp16 a = 1.0; + __fp16 result; + + asm ("vabs.f16 %0, %1" + : "=w"(result) + : "w"(a) + : /* No clobbers. */); + + return (result == 1.0) ? 0 : 1; + } + } [add_options_for_arm_v8_2a_fp16_scalar ""]] +} + +# Return 1 if the target supports executing instructions Adv.SIMD +# instructions from ARMv8.2 with the FP16 extension, 0 otherwise. The +# test is valid for ARM. + +proc check_effective_target_arm_v8_2a_fp16_neon_hw { } { + if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } { + return 0; + } + return [check_runtime arm_v8_2a_fp16_neon_hw_available { + int + main (void) + { + __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0}; + __simd64_float16_t result; + + asm ("vabs.f16 %P0, %P1" + : "=w"(result) + : "w"(a) + : /* No clobbers. */); + + return (result[0] == 1.0) ? 0 : 1; + } + } [add_options_for_arm_v8_2a_fp16_neon ""]] +} + # Return 1 if this is a ARM target with NEON enabled. proc check_effective_target_arm_neon { } { -- 2.1.4 --------------010405000508080401050604--