From: Kyrill Tkachov <kyrylo.tkachov@foss.arm.com>
To: Thomas Preudhomme <thomas.preudhomme@foss.arm.com>,
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>,
Richard Earnshaw <richard.earnshaw@arm.com>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH, GCC/testsuite/ARM, ping3] Fix coprocessor intrinsic test failures on ARMv8-A
Date: Wed, 13 Sep 2017 09:20:00 -0000 [thread overview]
Message-ID: <59B8F854.8080202@foss.arm.com> (raw)
In-Reply-To: <d7d1478a-3cc3-7546-610c-dda37ff93aa6@foss.arm.com>
On 05/09/17 10:04, Thomas Preudhomme wrote:
> Ping?
>
> Best regards,
>
> Thomas
>
> On 23/08/17 11:59, Thomas Preudhomme wrote:
>> Ping?
>>
>> Best regards,
>>
>> Thomas
>>
>> On 17/07/17 09:51, Thomas Preudhomme wrote:
>>> Ping?
>>>
>>> Best regards,
>>>
>>> Thomas
>>>
>>> On 12/07/17 14:31, Thomas Preudhomme wrote:
>>>> Coprocessor intrinsic tests in gcc.target/arm/acle test whether
>>>> __ARM_FEATURE_COPROC has the right bit defined before calling the
>>>> intrinsic. This allows to test both the correct setting of that macro
>>>> and the availability and correct working of the intrinsic. However the
>>>> __ARM_FEATURE_COPROC macro is no longer defined for ARMv8-A since
>>>> r249399.
>>>>
>>>> This patch changes the testcases to skip that test for ARMv8-A and
>>>> ARMv8-R targets. It also fixes some irregularity in the coprocessor
>>>> effective targets:
>>>> - add ldcl and stcl to the list of instructions listed as guarded by
>>>> arm_coproc1_ok
>>>> - enable tests guarded by arm_coproc2_ok, arm_coproc3_ok and
>>>> arm_coproc4_ok for Thumb-2 capable targets but disable for Thumb-1
>>>> targets.
>>>>
Ok.
Thanks,
Kyrill
>>>> ChangeLog entry is as follows:
>>>>
>>>> *** gcc/testsuite/ChangeLog ***
>>>>
>>>> 2017-07-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
>>>>
>>>> * gcc.target/arm/acle/cdp.c: Skip __ARM_FEATURE_COPROC check for
>>>> ARMv8-A and ARMv8-R.
>>>> * gcc.target/arm/acle/cdp2.c: Likewise.
>>>> * gcc.target/arm/acle/ldc.c: Likewise.
>>>> * gcc.target/arm/acle/ldc2.c: Likewise.
>>>> * gcc.target/arm/acle/ldc2l.c: Likewise.
>>>> * gcc.target/arm/acle/ldcl.c: Likewise.
>>>> * gcc.target/arm/acle/mcr.c: Likewise.
>>>> * gcc.target/arm/acle/mcr2.c: Likewise.
>>>> * gcc.target/arm/acle/mcrr.c: Likewise.
>>>> * gcc.target/arm/acle/mcrr2.c: Likewise.
>>>> * gcc.target/arm/acle/mrc.c: Likewise.
>>>> * gcc.target/arm/acle/mrc2.c: Likewise.
>>>> * gcc.target/arm/acle/mrrc.c: Likewise.
>>>> * gcc.target/arm/acle/mrrc2.c: Likewise.
>>>> * gcc.target/arm/acle/stc.c: Likewise.
>>>> * gcc.target/arm/acle/stc2.c: Likewise.
>>>> * gcc.target/arm/acle/stc2l.c: Likewise.
>>>> * gcc.target/arm/acle/stcl.c: Likewise.
>>>> * lib/target-supports.exp:
>>>> (check_effective_target_arm_coproc1_ok_nocache): Mention ldcl
>>>> and stcl in the comment.
>>>> (check_effective_target_arm_coproc2_ok_nocache): Allow Thumb-2
>>>> targets
>>>> and disable Thumb-1 targets.
>>>> (check_effective_target_arm_coproc3_ok_nocache): Likewise.
>>>> (check_effective_target_arm_coproc4_ok_nocache): Likewise.
>>>>
>>>> Tested by running all tests in gcc.target/arm/acle before and after
>>>> this
>>>> patch for ARMv6-M, ARMv7-M, ARMv7E-M, ARMv3, ARMv4 (ARM state), ARMv4T
>>>> (Thumb state), ARMv5 (ARM state), ARMv5TE (ARM state), ARMv6 (ARM
>>>> state), ARMv6T2 (Thumb state) and and ARMv8-A (both state). The only
>>>> changes are for ARMv8-A where tests FAILing are now PASSing again.
>>>>
>>>> Is this ok for trunk?
>>>>
>>>> Best regards,
>>>>
>>>> Thomas
prev parent reply other threads:[~2017-09-13 9:20 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-12 13:31 [PATCH, GCC/testsuite/ARM] " Thomas Preudhomme
2017-07-17 8:51 ` [PATCH, GCC/testsuite/ARM, ping] " Thomas Preudhomme
2017-08-23 12:09 ` [PATCH, GCC/testsuite/ARM, ping2] " Thomas Preudhomme
2017-09-05 9:04 ` [PATCH, GCC/testsuite/ARM, ping3] " Thomas Preudhomme
2017-09-13 9:20 ` Kyrill Tkachov [this message]
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