Re: Re: [PATCH V3] RISC-V: Fix bug of pre-calculated const vector mask for VNx1BI, VNx2BI and VNx4BI

[钟居哲 <juzhe.zhong@rivai.ai>]

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Try this:
https://godbolt.org/z/x7bM5Pr84 




juzhe.zhong@rivai.ai
 
From: Jeff Law
Date: 2023-06-29 02:11
To: Juzhe-Zhong; gcc-patches
CC: kito.cheng; kito.cheng; palmer; palmer; rdapp.gcc
Subject: Re: [PATCH V3] RISC-V: Fix bug of pre-calculated const vector mask for VNx1BI, VNx2BI and VNx4BI
 
 
On 6/28/23 03:47, Juzhe-Zhong wrote:
> This bug blocks the following patches.
> 
> GCC doesn't know RVV is using compact mask model.
> Consider this following case:
> 
> #define N 16
> 
> int
> main ()
> {
>    int8_t mask[N] = {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1};
>    int8_t out[N] = {0};
>    for (int8_t i = 0; i < N; ++i)
>      if (mask[i])
>        out[i] = i;
>    for (int8_t i = 0; i < N; ++i)
>      {
>        if (mask[i])
> assert (out[i] == i);
>        else
> assert (out[i] == 0);
>      }
> }
> 
> Before this patch, the pre-calculated mask in constant memory pool:
> .LC1:
>          .byte   68 ====> 0b01000100
> 
> This is incorrect, such case failed in execution.
> 
> After this patch:
> .LC1:
> .byte 10 ====> 0b1010
So I don't get anything like this in my testing.  What are the precise 
arguments you're using to build the testcase?
 
I'm compiling the test use a trunk compiler with
 
  -O3 --param riscv-autovec-preference=fixed-vlmax -march=rv64gcv
 
I get the attached code both before and after your patch.  Clearly I'm 
doing something different/wrong.    So my request is for the precise 
command line you're using and the before/after resulting assembly code.
 
Jeff