From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 116588 invoked by alias); 22 Oct 2018 20:52:18 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 116575 invoked by uid 89); 22 Oct 2018 20:52:17 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:2163 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 22 Oct 2018 20:52:16 +0000 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 77E28300206F; Mon, 22 Oct 2018 20:52:14 +0000 (UTC) Received: from localhost.localdomain (ovpn-112-46.rdu2.redhat.com [10.10.112.46]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3AB4660190; Mon, 22 Oct 2018 20:52:12 +0000 (UTC) Subject: Re: [PATCH] combine: Do not combine moves from hard registers To: Segher Boessenkool , gcc-patches@gcc.gnu.org Cc: bergner@linux.ibm.com References: <68abf72a5400b96b9a100966331d3ad2056648e7.1540237620.git.segher@kernel.crashing.org> From: Jeff Law Openpgp: preference=signencrypt Message-ID: <59f7ad07-5230-3b65-ed02-7f9e806c383e@redhat.com> Date: Mon, 22 Oct 2018 22:07:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <68abf72a5400b96b9a100966331d3ad2056648e7.1540237620.git.segher@kernel.crashing.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2018-10/txt/msg01363.txt.bz2 On 10/22/18 2:17 PM, Segher Boessenkool wrote: > On most targets every function starts with moves from the parameter > passing (hard) registers into pseudos. Similarly, after every call > there is a move from the return register into a pseudo. These moves > usually combine with later instructions (leaving pretty much the same > instruction, just with a hard reg instead of a pseudo). > > This isn't a good idea. Register allocation can get rid of unnecessary > moves just fine, and moving the parameter passing registers into many > later instructions tends to prevent good register allocation. This > patch disallows combining moves from a hard (non-fixed) register. > > This also avoid the problem mentioned in PR87600 #c3 (combining hard > registers into inline assembler is problematic). > > Because the register move can often be combined with other instructions > *itself*, for example for setting some condition code, this patch adds > extra copies via new pseudos after every copy-from-hard-reg. > > On some targets this reduces average code size. On others it increases > it a bit, 0.1% or 0.2% or so. (I tested this on all *-linux targets). > > I'll commit this to trunk now. If there are problems, please don't > hesitate to let me know! Thanks. > > > Segher > > > 2018-10-22 Segher Boessenkool > > PR rtl-optimization/87600 > * combine.c: Add include of expr.h. > (cant_combine_insn_p): Do not combine moves from any hard non-fixed > register to a pseudo. > (make_more_copies): New function, add a copy to a new pseudo after > the moves from hard registers into pseudos. > (rest_of_handle_combine): Declare rebuild_jump_labels_after_combine > later. Call make_more_copies. I know we've gone back and forth on this stuff through the years, particularly for targets with likely-to-spilled classes that are used for register passing/return values. I'm certainly willing to go with this as general guidance. I wouldn't be surprised if we find that things like CSE, fwprop and other passes need twiddling over time to mimick what you're doing in combine. jeff