From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 76387 invoked by alias); 8 Feb 2018 17:11:09 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 76365 invoked by uid 89); 8 Feb 2018 17:11:09 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.9 required=5.0 tests=BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,KAM_LAZY_DOMAIN_SECURITY,KAM_SHORT,T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=qq, QQ X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 08 Feb 2018 17:11:07 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D62FC80D; Thu, 8 Feb 2018 09:11:05 -0800 (PST) Received: from [10.2.207.77] (e100706-lin.cambridge.arm.com [10.2.207.77]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5E1493F24D; Thu, 8 Feb 2018 09:11:05 -0800 (PST) Message-ID: <5A7C84A7.9090500@foss.arm.com> Date: Thu, 08 Feb 2018 17:11:00 -0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" CC: Uros Bizjak Subject: [PATCH][i386][3/3] PR target/84164: Make *cmpqi_ext_ patterns accept more zero_extract modes Content-Type: multipart/mixed; boundary="------------040506060602060509070804" X-SW-Source: 2018-02/txt/msg00445.txt.bz2 This is a multi-part message in MIME format. --------------040506060602060509070804 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-length: 2412 Hi all, This patch fixes some fallout in the i386 testsuite that occurs after the simplification in patch [1/3] [1]. The gcc.target/i386/extract-2.c FAILs because it expects to match: (set (reg:CC 17 flags) (compare:CC (subreg:QI (zero_extract:SI (reg:HI 98) (const_int 8 [0x8]) (const_int 8 [0x8])) 0) (const_int 4 [0x4]))) which is the *cmpqi_ext_2 pattern in i386.md but with the new simplification the combine/simplify-rtx machinery produces: (set (reg:CC 17 flags) (compare:CC (subreg:QI (zero_extract:HI (reg:HI 98) (const_int 8 [0x8]) (const_int 8 [0x8])) 0) (const_int 4 [0x4]))) Notice that the zero_extract now has HImode like the register source rather than SImode. The existing *cmpqi_ext_ patterns however explicitly demand an SImode on the zero_extract. I'm not overly familiar with the i386 port but I think that's too restrictive. The RTL documentation says: For (zero_extract:m loc size pos) "The mode m is the same as the mode that would be used for loc if it were a register." I'm not sure if that means that the mode of the zero_extract and the source register must always match (as is the case after patch [1/3]) but in any case it shouldn't matter semantically since we're taking a QImode subreg of the whole thing anyway. So the proposed solution in this patch is to allow HI, SI and DImode zero_extracts in these patterns as these are the modes that the ext_register_operand predicate accepts, so that the patterns can match the new form above. With this patch the aforementioned test passes again and bootstrap and testing on x86_64-unknown-linux-gnu shows no regressions. Is this ok for trunk if the first patch is accepted? Thanks, Kyrill [1] https://gcc.gnu.org/ml/gcc-patches/2018-02/msg00443.html 2018-02-07 Kyrylo Tkachov PR target/84164 * config/i386/i386.md (*cmpqi_ext_1): Rename to... (*cmpqi_ext_1): ... This. Use SWI248 mode iterator for zero_extract. (*cmpqi_ext_2): Rename to... (*cmpqi_ext_2): ... This. Use SWI248 mode iterator for zero_extract. (*cmpqi_ext_3): Rename to... (*cmpqi_ext_3): ... This. Use SWI248 mode iterator for zero_extract. (*cmpqi_ext_4): Rename to... (*cmpqi_ext_4): ... This. Use SWI248 mode iterator for zero_extract. --------------040506060602060509070804 Content-Type: text/x-patch; name="i386-modes.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="i386-modes.patch" Content-length: 1991 diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index a4832bf696f321e8ee5aad71fa946ca198d9d689..ced9a3e823ae6c4586be510a782d354f4d364daa 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1328,12 +1328,12 @@ (define_insn "*cmp_minus_1" [(set_attr "type" "icmp") (set_attr "mode" "")]) -(define_insn "*cmpqi_ext_1" +(define_insn "*cmpqi_ext_1" [(set (reg FLAGS_REG) (compare (match_operand:QI 0 "nonimmediate_operand" "QBc,m") (subreg:QI - (zero_extract:SI + (zero_extract:SWI248 (match_operand 1 "ext_register_operand" "Q,Q") (const_int 8) (const_int 8)) 0)))] @@ -1343,11 +1343,11 @@ (define_insn "*cmpqi_ext_1" (set_attr "type" "icmp") (set_attr "mode" "QI")]) -(define_insn "*cmpqi_ext_2" +(define_insn "*cmpqi_ext_2" [(set (reg FLAGS_REG) (compare (subreg:QI - (zero_extract:SI + (zero_extract:SWI248 (match_operand 0 "ext_register_operand" "Q") (const_int 8) (const_int 8)) 0) @@ -1368,11 +1368,11 @@ (define_expand "cmpqi_ext_3" (const_int 8)) 0) (match_operand:QI 1 "const_int_operand")))]) -(define_insn "*cmpqi_ext_3" +(define_insn "*cmpqi_ext_3" [(set (reg FLAGS_REG) (compare (subreg:QI - (zero_extract:SI + (zero_extract:SWI248 (match_operand 0 "ext_register_operand" "Q,Q") (const_int 8) (const_int 8)) 0) @@ -1383,16 +1383,16 @@ (define_insn "*cmpqi_ext_3" (set_attr "type" "icmp") (set_attr "mode" "QI")]) -(define_insn "*cmpqi_ext_4" +(define_insn "*cmpqi_ext_4" [(set (reg FLAGS_REG) (compare (subreg:QI - (zero_extract:SI + (zero_extract:SWI248 (match_operand 0 "ext_register_operand" "Q") (const_int 8) (const_int 8)) 0) (subreg:QI - (zero_extract:SI + (zero_extract:SWI248 (match_operand 1 "ext_register_operand" "Q") (const_int 8) (const_int 8)) 0)))] --------------040506060602060509070804--