From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26984 invoked by alias); 4 Sep 2018 11:38:18 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 26967 invoked by uid 89); 4 Sep 2018 11:38:17 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=BAYES_00,KAM_LAZY_DOMAIN_SECURITY autolearn=no version=3.3.2 spammy=steve, Steve X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 04 Sep 2018 11:38:16 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3AA2B80D; Tue, 4 Sep 2018 04:38:14 -0700 (PDT) Received: from [10.2.207.77] (e100706-lin.cambridge.arm.com [10.2.207.77]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A92723F5BC; Tue, 4 Sep 2018 04:38:12 -0700 (PDT) Message-ID: <5B8E6EA3.6020704@foss.arm.com> Date: Tue, 04 Sep 2018 11:38:00 -0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: "sellcey@cavium.com" , Segher Boessenkool CC: Kyrill Tkachov , gcc-patches , Wilco Dijkstra , Richard Sandiford , Richard Earnshaw , James Greenhalgh , Marcus Shawcroft Subject: Re: [Patch][Aarch64] Implement Aarch64 SIMD ABI and aarch64_vector_pcs attribute References: <1533075888.3879.14.camel@cavium.com> <5B61A40E.1040501@foss.arm.com> <1533593632.3879.90.camel@cavium.com> <20180807171509.GH31204@gate.crashing.org> <1534786623.20144.12.camel@cavium.com> In-Reply-To: <1534786623.20144.12.camel@cavium.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2018-09/txt/msg00170.txt.bz2 Hi Steve, On 20/08/18 18:37, Steve Ellcey wrote: > On Tue, 2018-08-07 at 12:15 -0500, Segher Boessenkool wrote: > > > > +/* { dg-final { scan-assembler-not "\[ \t\]stp\tq\[01234567\]" } } > > > */ > > That's [0-7] but maybe you find [01234567] more readable here. > > Segher, I fixed all the issues you pointed out except this one. Since > there are some uses of non consecutive numbers in one of the tests I > decided to leave [01234567] instead of using [0-7]. Here is the > latest version of the patch, there are no semantic changes, just > syntactical ones to address the issues that you pointed out. > > Steve Ellcey > sellcey@cavium.com > One more comment below. It looks sensible enough to me otherwise, but I haven't done a deep review of the logic. Thanks, Kyrill > > 2018-08-20 Steve Ellcey > > * config/aarch64/aarch64-protos.h (aarch64_use_simple_return_insn_p): > New prototype. > (aarch64_epilogue_uses): Ditto. > * config/aarch64/aarch64.c (aarch64_attribute_table): New array. > (aarch64_simd_decl_p): New function. > (aarch64_reg_save_mode): New function. > (aarch64_is_simd_call_p): New function. > (aarch64_function_ok_for_sibcall): Check for simd calls. > (aarch64_layout_frame): Check for simd function. > (aarch64_gen_storewb_pair): Handle E_TFmode. > (aarch64_push_regs): Use aarch64_reg_save_mode to get mode. > (aarch64_gen_loadwb_pair): Handle E_TFmode. > (aarch64_pop_regs): Use aarch64_reg_save_mode to get mode. > (aarch64_gen_store_pair): Handle E_TFmode. > (aarch64_gen_load_pair): Ditto. > (aarch64_save_callee_saves): Handle different mode sizes. > (aarch64_restore_callee_saves): Ditto. > (aarch64_components_for_bb): Check for simd function. > (aarch64_epilogue_uses): New function. > (aarch64_process_components): Check for simd function. > (aarch64_expand_prologue): Ditto. > (aarch64_expand_epilogue): Ditto. > (aarch64_expand_call): Ditto. > (TARGET_ATTRIBUTE_TABLE): New define. > * config/aarch64/aarch64.h (EPILOGUE_USES): Redefine. > (FP_SIMD_SAVED_REGNUM_P): New macro. > * config/aarch64/aarch64.md (V23_REGNUM) New constant. > (simple_return): New define_expand. > (load_pair_dw_tftf): New instruction. > (store_pair_dw_tftf): Ditto. > (loadwb_pair_): Ditto. > ("storewb_pair_): Ditto. > > 2018-08-20 Steve Ellcey > > * gcc.target/aarch64/torture/aarch64-torture.exp: New file. > * gcc.target/aarch64/torture/simd-abi-1.c: New test. > * gcc.target/aarch64/torture/simd-abi-2.c: Ditto. > * gcc.target/aarch64/torture/simd-abi-3.c: Ditto. > * gcc.target/aarch64/torture/simd-abi-4.c: Ditto. @@ -4469,6 +4536,9 @@ aarch64_restore_callee_saves (machine_mode mode, unsigned regno; unsigned regno2; poly_int64 offset; + HOST_WIDE_INT mode_size; + + gcc_assert (GET_MODE_SIZE (mode).is_constant(&mode_size)); I think you want to use the gcc_unreachable approach here: if (!GET_MODE_SIZE (mode).is_constant(&mode_size)) gcc_unreachable (); just in case the gcc_assert is compiled out.