[PATCH 7/9][GCC][Arm] Enable autovectorization of Half float values

[PATCH 7/9][GCC][Arm] Enable autovectorization of Half float values

[Tamar Christina]

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Hi All,

The AArch32 backend is currently not able to support autovectorization of half-float values
on ARM. This is because we never told the vectorizer what the vector modes are for Half floats.

This enables autovectorization by definiting V4HF and V8HF as the vector modes.

Bootstrap and Regtest on aarch64-none-linux-gnu, arm-none-gnueabihf and x86_64-pc-linux-gnu
are still on going but previous patch showed no regressions.

Ok for trunk?

Thanks,
Tamar

gcc/ChangeLog:

2018-11-11  Tamar Christina  <tamar.christina@arm.com>

	* config/arm/arm.c (arm_preferred_simd_mode): Add V4HF and V8HF.

-- 

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diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 8393f0b87f34c04c9dcc89c63d2e9bbd042c969c..79502606b632e6a187732c8b3be118df8bde149a 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -27211,6 +27211,8 @@ arm_preferred_simd_mode (scalar_mode mode)
   if (TARGET_NEON)
     switch (mode)
       {
+      case E_HFmode:
+	return TARGET_NEON_VECTORIZE_DOUBLE ? V4HFmode : V8HFmode;
       case E_SFmode:
 	return TARGET_NEON_VECTORIZE_DOUBLE ? V2SFmode : V4SFmode;
       case E_SImode:

RE: [PATCH 7/9][GCC][Arm] Enable autovectorization of Half float values

[Tamar Christina]

Ping.

> -----Original Message-----
> From: gcc-patches-owner@gcc.gnu.org <gcc-patches-owner@gcc.gnu.org>
> On Behalf Of Tamar Christina
> Sent: Sunday, November 11, 2018 10:28
> To: gcc-patches@gcc.gnu.org
> Cc: nd <nd@arm.com>; Ramana Radhakrishnan
> <Ramana.Radhakrishnan@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; nickc@redhat.com; Kyrylo Tkachov
> <Kyrylo.Tkachov@arm.com>
> Subject: [PATCH 7/9][GCC][Arm] Enable autovectorization of Half float values
> 
> Hi All,
> 
> The AArch32 backend is currently not able to support autovectorization of
> half-float values on ARM. This is because we never told the vectorizer what
> the vector modes are for Half floats.
> 
> This enables autovectorization by definiting V4HF and V8HF as the vector
> modes.
> 
> Bootstrap and Regtest on aarch64-none-linux-gnu, arm-none-gnueabihf and
> x86_64-pc-linux-gnu are still on going but previous patch showed no
> regressions.
> 
> Ok for trunk?
> 
> Thanks,
> Tamar
> 
> gcc/ChangeLog:
> 
> 2018-11-11  Tamar Christina  <tamar.christina@arm.com>
> 
> 	* config/arm/arm.c (arm_preferred_simd_mode): Add V4HF and
> V8HF.
> 
> --

Re: [PATCH 7/9][GCC][Arm] Enable autovectorization of Half float values

[Kyrill Tkachov]

Hi Tamar,

On 11/11/18 10:27, Tamar Christina wrote:
> Hi All,
>
> The AArch32 backend is currently not able to support autovectorization of half-float values
> on ARM. This is because we never told the vectorizer what the vector modes are for Half floats.
>
> This enables autovectorization by definiting V4HF and V8HF as the vector modes.
>
> Bootstrap and Regtest on aarch64-none-linux-gnu, arm-none-gnueabihf and x86_64-pc-linux-gnu
> are still on going but previous patch showed no regressions.
>

Did the testing go okay in the end?
This looks ok to me but can you provide an example, or better yet, add a test that demonstrates this changes?

Thanks,
Kyrill

> Ok for trunk?
>
> Thanks,
> Tamar
>
> gcc/ChangeLog:
>
> 2018-11-11  Tamar Christina  <tamar.christina@arm.com>
>
>         * config/arm/arm.c (arm_preferred_simd_mode): Add V4HF and V8HF.
>
> -- 

RE: [PATCH 7/9][GCC][Arm] Enable autovectorization of Half float values

[Tamar Christina]

Hi Kyrill,

> >
> > Bootstrap and Regtest on aarch64-none-linux-gnu, arm-none-gnueabihf
> > and x86_64-pc-linux-gnu are still on going but previous patch showed no
> regressions.
> >
> 
> Did the testing go okay in the end?

Yes it was clean.

> This looks ok to me but can you provide an example, or better yet, add a test
> that demonstrates this changes?

I've tried, but without the rest of the patch series I can't seem to come with an example that enters the given path.
The failure only happens when the vectorizer tries to vectorize to an unknown size. 

Most simple math operations would have a known size based on the vectorization factor, in any case, I'll hold off this patch then
Until the rest of the series is retried in stage 1.

Thanks,
Tamar

> 
> Thanks,
> Kyrill
> 
> > Ok for trunk?
> >
> > Thanks,
> > Tamar
> >
> > gcc/ChangeLog:
> >
> > 2018-11-11  Tamar Christina  <tamar.christina@arm.com>
> >
> >         * config/arm/arm.c (arm_preferred_simd_mode): Add V4HF and V8HF.
> >
> > --