From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 128337 invoked by alias); 21 Dec 2018 11:02:03 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 128215 invoked by uid 89); 21 Dec 2018 11:02:02 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=BAYES_00,KAM_LAZY_DOMAIN_SECURITY autolearn=no version=3.3.2 spammy=Hx-languages-length:927, half X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 21 Dec 2018 11:01:57 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9EA5F80D; Fri, 21 Dec 2018 03:01:55 -0800 (PST) Received: from [10.2.207.77] (e100706-lin.cambridge.arm.com [10.2.207.77]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 86F5C3F5C0; Fri, 21 Dec 2018 03:01:54 -0800 (PST) Message-ID: <5C1CC821.6040509@foss.arm.com> Date: Fri, 21 Dec 2018 11:10:00 -0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: Tamar Christina , "gcc-patches@gcc.gnu.org" CC: nd , Ramana Radhakrishnan , Richard Earnshaw , "nickc@redhat.com" Subject: Re: [PATCH 7/9][GCC][Arm] Enable autovectorization of Half float values References: <20181111102751.GA4667@arm.com> In-Reply-To: <20181111102751.GA4667@arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2018-12/txt/msg01553.txt.bz2 Hi Tamar, On 11/11/18 10:27, Tamar Christina wrote: > Hi All, > > The AArch32 backend is currently not able to support autovectorization of half-float values > on ARM. This is because we never told the vectorizer what the vector modes are for Half floats. > > This enables autovectorization by definiting V4HF and V8HF as the vector modes. > > Bootstrap and Regtest on aarch64-none-linux-gnu, arm-none-gnueabihf and x86_64-pc-linux-gnu > are still on going but previous patch showed no regressions. > Did the testing go okay in the end? This looks ok to me but can you provide an example, or better yet, add a test that demonstrates this changes? Thanks, Kyrill > Ok for trunk? > > Thanks, > Tamar > > gcc/ChangeLog: > > 2018-11-11 Tamar Christina > > * config/arm/arm.c (arm_preferred_simd_mode): Add V4HF and V8HF. > > --