From: HAO CHEN GUI <guihaoc@linux.ibm.com>
To: gcc-patches <gcc-patches@gcc.gnu.org>
Cc: Segher Boessenkool <segher@kernel.crashing.org>,
David <dje.gcc@gmail.com>, "Kewen.Lin" <linkw@linux.ibm.com>,
Peter Bergner <bergner@linux.ibm.com>
Subject: [PATCH v3, rs6000] Change mode and insn condition for VSX scalar extract/insert instructions
Date: Wed, 7 Sep 2022 15:44:34 +0800 [thread overview]
Message-ID: <5a2217c9-784a-d180-fabd-45e5ea88db9f@linux.ibm.com> (raw)
Hi,
For scalar extract/insert instructions, exponent field can be stored in a
32-bit register. So this patch changes the mode of exponent field from DI to
SI. The instructions using DI registers can be invoked with -mpowerpc64 in a
32-bit environment. The patch changes insn condition from TARGET_64BIT to
TARGET_POWERPC64 for those instructions.
This patch also changes prototypes of relevant built-ins and effective
target of test cases.
Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
Is this okay for trunk? Any recommendations? Thanks a lot.
ChangeLog
2022-09-07 Haochen Gui <guihaoc@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtins.def
(__builtin_vsx_scalar_extract_exp): Set return type to const unsigned
int.
(__builtin_vsx_scalar_extract_sig): Set return type to const unsigned
long long.
(__builtin_vsx_scalar_insert_exp): Set type of second argument to
unsigned int.
(__builtin_vsx_scalar_insert_exp_dp): Likewise.
* config/rs6000/vsx.md (xsxexpdp): Set mode of first operand to
SImode. Remove TARGET_64BIT from insn condition.
(xsxsigdp): Change insn condition from TARGET_64BIT to TARGET_POWERPC64.
(xsiexpdp): Change insn condition from TARGET_64BIT to
TARGET_POWERPC64. Set mode of third operand to SImode.
(xsiexpdpf): Set mode of third operand to SImode. Remove TARGET_64BIT
from insn condition.
gcc/testsuite/
* gcc.target/powerpc/bfp/scalar-extract-exp-0.c: Change effective
target from lp64 to has_arch_ppc64.
* gcc.target/powerpc/bfp/scalar-extract-exp-6.c: Likewise.
* gcc.target/powerpc/bfp/scalar-extract-sig-0.c: Likewise.
* gcc.target/powerpc/bfp/scalar-extract-sig-6.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-0.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-12.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-13.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-3.c: Likewise.
patch.diff
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index f76f54793d7..ca2a1d7657e 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -2847,17 +2847,17 @@
pure vsc __builtin_vsx_lxvl (const void *, signed long);
LXVL lxvl {}
- const signed long __builtin_vsx_scalar_extract_exp (double);
+ const unsigned int __builtin_vsx_scalar_extract_exp (double);
VSEEDP xsxexpdp {}
- const signed long __builtin_vsx_scalar_extract_sig (double);
+ const unsigned long long __builtin_vsx_scalar_extract_sig (double);
VSESDP xsxsigdp {}
const double __builtin_vsx_scalar_insert_exp (unsigned long long, \
- unsigned long long);
+ unsigned int);
VSIEDP xsiexpdp {}
- const double __builtin_vsx_scalar_insert_exp_dp (double, unsigned long long);
+ const double __builtin_vsx_scalar_insert_exp_dp (double, unsigned int);
VSIEDPF xsiexpdpf {}
pure vsc __builtin_vsx_xl_len_r (void *, signed long);
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index e226a93bbe5..9d3a2340a79 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -5095,10 +5095,10 @@ (define_insn "xsxexpqp_<mode>"
;; VSX Scalar Extract Exponent Double-Precision
(define_insn "xsxexpdp"
- [(set (match_operand:DI 0 "register_operand" "=r")
- (unspec:DI [(match_operand:DF 1 "vsx_register_operand" "wa")]
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (unspec:SI [(match_operand:DF 1 "vsx_register_operand" "wa")]
UNSPEC_VSX_SXEXPDP))]
- "TARGET_P9_VECTOR && TARGET_64BIT"
+ "TARGET_P9_VECTOR"
"xsxexpdp %0,%x1"
[(set_attr "type" "integer")])
@@ -5116,7 +5116,7 @@ (define_insn "xsxsigdp"
[(set (match_operand:DI 0 "register_operand" "=r")
(unspec:DI [(match_operand:DF 1 "vsx_register_operand" "wa")]
UNSPEC_VSX_SXSIG))]
- "TARGET_P9_VECTOR && TARGET_64BIT"
+ "TARGET_P9_VECTOR && TARGET_POWERPC64"
"xsxsigdp %0,%x1"
[(set_attr "type" "integer")])
@@ -5145,9 +5145,9 @@ (define_insn "xsiexpqp_<mode>"
(define_insn "xsiexpdp"
[(set (match_operand:DF 0 "vsx_register_operand" "=wa")
(unspec:DF [(match_operand:DI 1 "register_operand" "r")
- (match_operand:DI 2 "register_operand" "r")]
+ (match_operand:SI 2 "register_operand" "r")]
UNSPEC_VSX_SIEXPDP))]
- "TARGET_P9_VECTOR && TARGET_64BIT"
+ "TARGET_P9_VECTOR && TARGET_POWERPC64"
"xsiexpdp %x0,%1,%2"
[(set_attr "type" "fpsimple")])
@@ -5155,9 +5155,9 @@ (define_insn "xsiexpdp"
(define_insn "xsiexpdpf"
[(set (match_operand:DF 0 "vsx_register_operand" "=wa")
(unspec:DF [(match_operand:DF 1 "register_operand" "r")
- (match_operand:DI 2 "register_operand" "r")]
+ (match_operand:SI 2 "register_operand" "r")]
UNSPEC_VSX_SIEXPDP))]
- "TARGET_P9_VECTOR && TARGET_64BIT"
+ "TARGET_P9_VECTOR"
"xsiexpdp %x0,%1,%2"
[(set_attr "type" "fpsimple")])
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-0.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-0.c
index 35bf1b240f3..9f327a4be6c 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-0.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-0.c
@@ -1,7 +1,7 @@
-/* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target has_arch_ppc64 } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
/* This test should succeed only on 64-bit configurations. */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-6.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-6.c
index b9dd7d61aae..136471a35b3 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-6.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-6.c
@@ -1,7 +1,7 @@
-/* { dg-do run { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target p9vector_hw } */
+/* { dg-do run } */
/* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target has_arch_ppc64 } */
+/* { dg-require-effective-target p9vector_hw } */
/* This test should succeed only on 64-bit configurations. */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c
index 637080652b7..3be7eb13566 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c
@@ -1,7 +1,7 @@
-/* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target has_arch_ppc64 } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
/* This test should succeed only on 64-bit configurations. */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-6.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-6.c
index c85072da138..b96a745157d 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-6.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-6.c
@@ -1,7 +1,7 @@
-/* { dg-do run { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target p9vector_hw } */
+/* { dg-do run } */
/* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target has_arch_ppc64 } */
+/* { dg-require-effective-target p9vector_hw } */
/* This test should succeed only on 64-bit configurations. */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c
index d8243258a67..074c23f4530 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c
@@ -1,7 +1,7 @@
-/* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target has_arch_ppc64 } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
/* This test should succeed only on 64-bit configurations. */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-12.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-12.c
index 384fc9cc675..6260e577c7d 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-12.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-12.c
@@ -1,7 +1,7 @@
-/* { dg-do run { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target p9vector_hw } */
+/* { dg-do run } */
/* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target has_arch_ppc64 } */
+/* { dg-require-effective-target p9vector_hw } */
/* This test should succeed only on 64-bit configurations. */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-13.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-13.c
index 0e004224277..f024d390a5d 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-13.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-13.c
@@ -1,7 +1,7 @@
-/* { dg-do run { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target p9vector_hw } */
+/* { dg-do run } */
/* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target has_arch_ppc64 } */
+/* { dg-require-effective-target p9vector_hw } */
/* This test should succeed only on 64-bit configurations. */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c
index 3ecbe3318e8..a65dce901df 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c
@@ -1,7 +1,7 @@
-/* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target has_arch_ppc64 } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
/* This test should succeed only on 64-bit configurations. */
#include <altivec.h>
next reply other threads:[~2022-09-07 7:44 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-07 7:44 HAO CHEN GUI [this message]
2022-09-21 5:32 ` Ping " HAO CHEN GUI
2022-10-20 9:27 ` Kewen.Lin
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