From: Carl Love <cel@us.ibm.com>
To: Segher Boessenkool <segher@kernel.crashing.org>,
will schmidt <will_schmidt@vnet.ibm.com>,
cel@us.ibm.com
Cc: dje.gcc@gmail.com, gcc-patches@gcc.gnu.org,
Bill Schmidt <wschmidt@linux.vnet.ibm.com>,
Peter Bergner <bergner@vnet.ibm.com>
Subject: [PATCH 3/5 ver4] RS6000: Add TI to TD (128-bit DFP) and TD to TI support
Date: Mon, 26 Apr 2021 09:36:19 -0700 [thread overview]
Message-ID: <5b3d2863a00319858af765a54d1ae2857ee8344e.camel@us.ibm.com> (raw)
In-Reply-To: <d660f874049b7fdb338ff33478c56b2259828ab1.camel@us.ibm.com>
Will, Segher:
This patch adds support for converting to/from 128-bit integers and
128-bit decimal floating point formats.
The patch has been tested on
powerpc64-linux instead (Power 8 BE)
powerpc64-linux instead (Power 9 LE)
powerpc64-linux instead (Power 10 LE)
Please let me know if the patch is acceptable for mainline.
Carl Love
------------------------------------------------
gcc/ChangeLog
dje.gcc@gmail.com, gcc-patches@gcc.gnu.org, Bill Schmidt <wschmidt@linux.vnet.ibm.com>, Peter Bergner <bergner@vnet.ibm.com>,
2021-04-26 Carl Love <cel@us.ibm.com>
* config/rs6000/dfp.md (floattitd2, fixtdti2): New define_insns.
* config/rs6000/rs6000-call.c (P10V_BUILTIN_VCMPNET_P,
P10V_BUILTIN_VCMPAET_P): New overloaded definitions.
gcc/testsuite/ChangeLog
2021-04-26 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/int_128bit-runnable.c: Add 128-bit DFP
conversion tests.
---
gcc/config/rs6000/dfp.md | 14 +++++
.../gcc.target/powerpc/int_128bit-runnable.c | 61 +++++++++++++++++++
2 files changed, 75 insertions(+)
diff --git a/gcc/config/rs6000/dfp.md b/gcc/config/rs6000/dfp.md
index 026be5d48a6..b89d5ecc91d 100644
--- a/gcc/config/rs6000/dfp.md
+++ b/gcc/config/rs6000/dfp.md
@@ -226,6 +226,13 @@
[(set_attr "type" "dfp")
(set_attr "size" "128")])
+(define_insn "floattitd2"
+ [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
+ (float:TD (match_operand:TI 1 "gpc_reg_operand" "v")))]
+ "TARGET_POWER10"
+ "dcffixqq %0,%1"
+ [(set_attr "type" "dfp")])
+
;; Convert a decimal64/128 to a decimal64/128 whose value is an integer.
;; This is the first stage of converting it to an integer type.
@@ -247,6 +254,13 @@
"dctfix<q> %0,%1"
[(set_attr "type" "dfp")
(set_attr "size" "<bits>")])
+
+(define_insn "fixtdti2"
+ [(set (match_operand:TI 0 "gpc_reg_operand" "=v")
+ (fix:TI (match_operand:TD 1 "gpc_reg_operand" "d")))]
+ "TARGET_POWER10"
+ "dctfixqq %0,%1"
+ [(set_attr "type" "dfp")])
\f
;; Decimal builtin support
diff --git a/gcc/testsuite/gcc.target/powerpc/int_128bit-runnable.c b/gcc/testsuite/gcc.target/powerpc/int_128bit-runnable.c
index 042758c8684..625b3869118 100644
--- a/gcc/testsuite/gcc.target/powerpc/int_128bit-runnable.c
+++ b/gcc/testsuite/gcc.target/powerpc/int_128bit-runnable.c
@@ -37,6 +37,7 @@
#if DEBUG
#include <stdio.h>
#include <stdlib.h>
+#include <math.h>
void print_i128(__int128_t val)
@@ -58,6 +59,13 @@ int main ()
__int128_t arg1, result;
__uint128_t uarg2;
+ _Decimal128 arg1_dfp128, result_dfp128, expected_result_dfp128;
+
+ struct conv_t {
+ __uint128_t u128;
+ _Decimal128 d128;
+ } conv, conv2;
+
vector signed long long int vec_arg1_di, vec_arg2_di;
vector signed long long int vec_result_di, vec_expected_result_di;
vector unsigned long long int vec_uarg1_di, vec_uarg2_di, vec_uarg3_di;
@@ -2258,6 +2266,59 @@ int main ()
abort();
#endif
}
+
+ /* DFP to __int128 and __int128 to DFP conversions */
+ /* Print the DFP value as an unsigned int so we can see the bit patterns. */
+ conv.u128 = 0x2208000000000000ULL;
+ conv.u128 = (conv.u128 << 64) | 0x4ULL; //DFP bit pattern for integer 4
+ expected_result_dfp128 = conv.d128;
+ arg1 = 4;
+
+ conv.d128 = (_Decimal128) arg1;
+
+ result_dfp128 = (_Decimal128) arg1;
+ if (((conv.u128 >>64) != 0x2208000000000000ULL) &&
+ ((conv.u128 & 0xFFFFFFFFFFFFFFFF) != 0x4ULL)) {
+#if DEBUG
+ printf("ERROR: convert int128 value ");
+ print_i128 (arg1);
+ conv.d128 = result_dfp128;
+ printf("\nto DFP value 0x%llx %llx (printed as hex bit string) ",
+ (unsigned long long)((conv.u128) >>64),
+ (unsigned long long)((conv.u128) & 0xFFFFFFFFFFFFFFFF));
+
+ conv.d128 = expected_result_dfp128;
+ printf("\ndoes not match expected_result = 0x%llx %llx\n\n",
+ (unsigned long long) (conv.u128>>64),
+ (unsigned long long) (conv.u128 & 0xFFFFFFFFFFFFFFFF));
+#else
+ abort();
+#endif
+ }
+
+ expected_result = 4;
+
+ conv.u128 = 0x2208000000000000ULL;
+ conv.u128 = (conv.u128 << 64) | 0x4ULL; // 4 as DFP
+ arg1_dfp128 = conv.d128;
+
+ result = (__int128_t) arg1_dfp128;
+
+ if (result != expected_result) {
+#if DEBUG
+ printf("ERROR: convert DFP value ");
+ printf("0x%llx %llx (printed as hex bit string) ",
+ (unsigned long long)(conv.u128>>64),
+ (unsigned long long)(conv.u128 & 0xFFFFFFFFFFFFFFFF));
+ printf("to __int128 value = ");
+ print_i128 (result);
+ printf("\ndoes not match expected_result = ");
+ print_i128 (expected_result);
+ printf("\n");
+#else
+ abort();
+#endif
+ }
return 0;
}
--
2.27.0
next prev parent reply other threads:[~2021-04-26 16:36 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <d660f874049b7fdb338ff33478c56b2259828ab1.camel@us.ibm.com>
2021-04-26 16:35 ` [PATCH 0/5 ver4] RS6000: Add 128-bit Integer Operations Carl Love
2021-04-26 16:35 ` [PATCH 1/5 " Carl Love
2021-04-27 23:46 ` will schmidt
2021-04-28 17:58 ` Carl Love
2021-05-26 21:03 ` Segher Boessenkool
2021-04-26 16:36 ` [PATCH 2/5 " Carl Love
2021-04-27 23:46 ` will schmidt
2021-06-04 20:20 ` Segher Boessenkool
2021-06-04 23:14 ` Segher Boessenkool
2021-04-26 16:36 ` Carl Love [this message]
2021-04-27 23:46 ` [PATCH 3/5 ver4] RS6000: Add TI to TD (128-bit DFP) and TD to TI support will schmidt
2021-06-04 23:55 ` Segher Boessenkool
2021-04-26 16:36 ` [PATCH 4/5 ver4] RS6000, Add test 128-bit shifts for just the int128 type Carl Love
2021-04-27 23:46 ` will schmidt
2021-06-05 0:03 ` Segher Boessenkool
2021-04-26 16:36 ` [PATCH 5/5 ver4] RS6000: Conversions between 128-bit integer and floating point values Carl Love
2021-04-27 23:46 ` will schmidt
2021-04-28 17:39 ` [PATCH ] RS6000 Add 128-bit Binary Integer sign extend operations Carl Love
2021-06-07 19:03 ` Segher Boessenkool
2021-06-07 18:49 ` [PATCH 5/5 ver4] RS6000: Conversions between 128-bit integer and floating point values Segher Boessenkool
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