[PATCH-2, rs6000] Change mode and insn condition for scalar extract sig instruction

[HAO CHEN GUI <guihaoc@linux.ibm.com>]

Hi,
  This patch changes the return type of __builtin_vsx_scalar_extract_sig
from const signed long to const signed long long, so that it can be called
with "-m32/-mpowerpc64" option. The bif needs TARGET_POWERPC64 instead of
TARGET_64BIT. So the condition check in the expander is changed.

  The test cases are modified according to the changes of expand pattern.

  Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
Is this okay for trunk? Any recommendations? Thanks a lot.

Gui Haochen

ChangeLog
2023-01-03  Haochen Gui  <guihaoc@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-builtins.def
	(__builtin_vsx_scalar_extract_sig): Set return type to const signed
	long long.
	* config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
	TARGET_POWERPC64.

gcc/testsuite/
	* gcc.target/powerpc/bfp/scalar-extract-sig-0.c: Replace lp64 check
	with has_arch_ppc64.
	* gcc.target/powerpc/bfp/scalar-extract-sig-1.c: Likewise.
	* gcc.target/powerpc/bfp/scalar-extract-sig-6.c: Likewise.

patch.diff
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index a8f1d3f1b3d..25647b7bdd2 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -2849,7 +2849,7 @@
   pure vsc __builtin_vsx_lxvl (const void *, signed long);
     LXVL lxvl {}

-  const signed long __builtin_vsx_scalar_extract_sig (double);
+  const signed long long __builtin_vsx_scalar_extract_sig (double);
     VSESDP xsxsigdp {}

   const double __builtin_vsx_scalar_insert_exp (unsigned long long, \
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 229c26c3a61..27e03a4cf6c 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -5111,7 +5111,7 @@ (define_insn "xsxsigdp"
   [(set (match_operand:DI 0 "register_operand" "=r")
 	(unspec:DI [(match_operand:DF 1 "vsx_register_operand" "wa")]
 	 UNSPEC_VSX_SXSIG))]
-  "TARGET_P9_VECTOR && TARGET_64BIT"
+  "TARGET_P9_VECTOR && TARGET_POWERPC64"
   "xsxsigdp %0,%x1"
   [(set_attr "type" "integer")])

diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c
index 637080652b7..d22f7d1b274 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target has_arch_ppc64 } */

 /* This test should succeed only on 64-bit configurations.  */
 #include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-1.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-1.c
index f12eed3d9d5..64747d73a51 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-1.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-options "-mdejagnu-cpu=power8" } */
+/* { dg-require-effective-target has_arch_ppc64 } */

 /* This test should succeed only on 64-bit configurations.  */
 #include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-6.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-6.c
index c85072da138..561be53fb9b 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-6.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-6.c
@@ -1,7 +1,7 @@
 /* { dg-do run { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
 /* { dg-require-effective-target p9vector_hw } */
 /* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target has_arch_ppc64 } */

 /* This test should succeed only on 64-bit configurations.  */
 #include <altivec.h>