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Mon, 30 Oct 2023 16:11:02 +0000 Received: from [192.168.20.10] (c-73-170-238-207.hsd1.ca.comcast.net [73.170.238.207]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: eager@eagerm.com) by pdx1-sub0-mail-a295.dreamhost.com (Postfix) with ESMTPSA id 4SJytY5tjZzyD; Mon, 30 Oct 2023 09:11:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=eagercon.com; s=dreamhost; t=1698682262; bh=nCJqwEflliPcytX6KDKH1a2qKSDaoHOyS+fWWKPlnYs=; h=Date:Subject:To:Cc:From:Content-Type:Content-Transfer-Encoding; b=Wmw6zSa1Q17yikijW1RKOPdEGogsfKkpFmoc7WYoQlocDlWLzAZZF44o6s22GQy27 rKMhyGD+oxf72qAFU5e6Q3LNw+N+V6Bsj4Ke+Wkhlh2H+5JRrjnPXWmRT3L5fNSMCh oaqTxQ7r7maK0bcp0oNDnPegwtX9f63QFFf8VzThuAPFgi6yRbm8GoM/OHx1Ggq+RM p5tTrTnciH0B09E4HPb3EYqHMvN5ZKfiRXVtHaWibxBNDAAOtBhX3FQs5N4m2eeeUN trF12LYgUXF8ZeMQIrLA6Llv91Q9ZFvIeDPLLQvusbnwp7goaCAed7jM2Y6maY0n9p uJ+fvVr6K9fqA== Message-ID: <5c8f7783-c854-43bd-a7da-9093626b92b0@eagercon.com> Date: Mon, 30 Oct 2023 09:11:00 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 1/1] gcc: config: microblaze: fix cpu version check Content-Language: en-US To: Neal Frager , gcc-patches@gcc.gnu.org, eager@eagerm.com Cc: ibai.erkiaga-elorza@amd.com, nagaraju.mekala@amd.com, mark.hatle@amd.com, sadanand.mutyala@amd.com, appa.rao.nali@amd.com, vidhumouli.hunsigida@amd.com, luca.ceresoli@bootlin.com References: <20231030061336.204603-1-neal.frager@amd.com> From: Michael Eager In-Reply-To: <20231030061336.204603-1-neal.frager@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-11.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 10/29/23 23:13, Neal Frager wrote: > The MICROBLAZE_VERSION_COMPARE was incorrectly using strcasecmp > instead of strverscmp to check the mcpu version against feature > options. By simply changing the define to use strverscmp, > the new version 10.0 is treated correctly as a higher version > than previous versions. > > Signed-off-by: Neal Frager > --- > V1->V2: > - No need to create a new microblaze specific version check > routine as strverscmp is the correct solution. > V2->V3: > - Changed mcpu define for microblaze isa testsuite examples. > V3->V4: > - Added ChangeLog > V4->V5: > - Added testsuite ChangeLog > --- > gcc/ChangeLog | 4 ++++ > gcc/config/microblaze/microblaze.cc | 2 +- > gcc/testsuite/ChangeLog | 4 ++++ > gcc/testsuite/gcc.target/microblaze/isa/bshift.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/div.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/fcvt.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/float.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/fsqrt.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/mul-bshift-pcmp.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/mul-bshift.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/mul.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/mulh-bshift-pcmp.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/mulh.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/nofloat.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/pcmp.c | 2 +- > gcc/testsuite/gcc.target/microblaze/isa/vanilla.c | 2 +- > gcc/testsuite/gcc.target/microblaze/microblaze.exp | 2 +- > 22 files changed, 28 insertions(+), 20 deletions(-) > > diff --git a/gcc/ChangeLog b/gcc/ChangeLog > index 4964796c6a6..7f63f39d4cd 100644 > --- a/gcc/ChangeLog > +++ b/gcc/ChangeLog > @@ -1,3 +1,7 @@ > +2023-10-30 Neal Frager > + > + * config/microblaze/microblaze.cc: Fix mcpu version check. > + > 2023-10-29 Martin Uecker > > PR tree-optimization/109334 > diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc > index c9f6c4198cf..60ad55120d2 100644 > --- a/gcc/config/microblaze/microblaze.cc > +++ b/gcc/config/microblaze/microblaze.cc > @@ -56,7 +56,7 @@ > /* This file should be included last. */ > #include "target-def.h" > > -#define MICROBLAZE_VERSION_COMPARE(VA,VB) strcasecmp (VA, VB) > +#define MICROBLAZE_VERSION_COMPARE(VA,VB) strverscmp (VA, VB) > > /* Classifies an address. > > diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog > index 5c18129b4ac..1d7abcf2584 100644 > --- a/gcc/testsuite/ChangeLog > +++ b/gcc/testsuite/ChangeLog > @@ -1,3 +1,7 @@ > +2023-10-30 Neal Frager > + > + * gcc.target/microblaze: Bump tests to mcpu=v10.0. Please look at gcc/testsuite/ChangeLog and follow the standard practice: List each file modified or added. For example: 2023-10-23 Pan Li * gcc.target/riscv/rvv/base/binop_vv_constraint-1.c: Remove the vsetvl asm check from func body. * gcc.target/riscv/rvv/base/binop_vx_constraint-1.c: Ditto. * gcc.target/riscv/rvv/base/binop_vx_constraint-10.c: Ditto. * gcc.target/riscv/rvv/base/binop_vx_constraint-11.c: Ditto. * gcc.target/riscv/rvv/base/binop_vx_constraint-12.c: Ditto. > + > 2023-10-29 Iain Buclaw > > PR d/110712 > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c > index 64cf1e2e59e..664586bff9f 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mxl-barrel-shift" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mxl-barrel-shift" } */ > > volatile int m1, m2, m3; > volatile unsigned int u1, u2, u3; > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/div.c b/gcc/testsuite/gcc.target/microblaze/isa/div.c > index 25ee42ce5c8..783e7c0f684 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/div.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/div.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mno-xl-soft-div" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mno-xl-soft-div" } */ > > volatile int m1, m2, m3; > volatile long l1, l2; > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c > index 4041a241391..b6202e168d6 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */ > > volatile float f1, f2, f3; > > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c > index 3902b839db9..4386c6e6cc3 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */ > > volatile float f1, f2, f3; > > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c > index 8555974dda5..b414e48fe1b 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */ > > volatile float f1, f2, f3; > > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c > index 79cc5f9dd8e..ff137012df4 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */ > > void float_func(float f1, float f2, float f3) > { > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcvt.c b/gcc/testsuite/gcc.target/microblaze/isa/fcvt.c > index ee057c1b6ac..90fd45bd3b3 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/fcvt.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcvt.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float -mxl-float-convert" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mhard-float -mxl-float-convert" } */ > > int float_func (float f) > { > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/float.c b/gcc/testsuite/gcc.target/microblaze/isa/float.c > index f5ef3186cdd..212435d6435 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/float.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/float.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */ > > volatile float f1, f2, f3; > > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fsqrt.c b/gcc/testsuite/gcc.target/microblaze/isa/fsqrt.c > index 4c2466e4a55..834767d7a40 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/fsqrt.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/fsqrt.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float -mxl-float-sqrt" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mhard-float -mxl-float-sqrt" } */ > #include > > float sqrt_func (float f) > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/mul-bshift-pcmp.c b/gcc/testsuite/gcc.target/microblaze/isa/mul-bshift-pcmp.c > index ce186314e6a..2720ad38f57 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/mul-bshift-pcmp.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/mul-bshift-pcmp.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mxl-barrel-shift -mno-xl-soft-mul -mxl-pattern-compare" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mxl-barrel-shift -mno-xl-soft-mul -mxl-pattern-compare" } */ > > volatile int m1, m2, m3; > volatile unsigned int u1, u2, u3; > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/mul-bshift.c b/gcc/testsuite/gcc.target/microblaze/isa/mul-bshift.c > index 76d174ec7c3..59a17c79bbe 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/mul-bshift.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/mul-bshift.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mxl-barrel-shift -mno-xl-soft-mul" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mxl-barrel-shift -mno-xl-soft-mul" } */ > > volatile int m1, m2, m3; > volatile unsigned int u1, u2, u3; > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/mul.c b/gcc/testsuite/gcc.target/microblaze/isa/mul.c > index d2a6bec61e2..e4e330a0d0c 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/mul.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/mul.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mno-xl-soft-mul" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mno-xl-soft-mul" } */ > > volatile int m1, m2, m3; > volatile long l1, l2; > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/mulh-bshift-pcmp.c b/gcc/testsuite/gcc.target/microblaze/isa/mulh-bshift-pcmp.c > index a15983af117..0f962030fdd 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/mulh-bshift-pcmp.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/mulh-bshift-pcmp.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mxl-barrel-shift -mno-xl-soft-mul -mxl-pattern-compare -mxl-multiply-high" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mxl-barrel-shift -mno-xl-soft-mul -mxl-pattern-compare -mxl-multiply-high" } */ > > volatile int m1, m2, m3; > volatile unsigned int u1, u2, u3; > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/mulh.c b/gcc/testsuite/gcc.target/microblaze/isa/mulh.c > index 6e0cc3ac470..da28e8c4d1e 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/mulh.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/mulh.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mno-xl-soft-mul -mxl-multiply-high" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mno-xl-soft-mul -mxl-multiply-high" } */ > > volatile int m1, m2, m3; > volatile unsigned int u1, u2, u3; > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c b/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c > index ebfb170ecee..86910fc347a 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a " } */ > +/* { dg-options "-O3 -mcpu=v10.0" } */ > > volatile float f1, f2, f3; > > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/nofloat.c b/gcc/testsuite/gcc.target/microblaze/isa/nofloat.c > index 647da3cfe24..b1f0268715d 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/nofloat.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/nofloat.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -msoft-float" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -msoft-float" } */ > > volatile float f1, f2, f3; > > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/pcmp.c b/gcc/testsuite/gcc.target/microblaze/isa/pcmp.c > index aea79572103..d9e5793f6f5 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/pcmp.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/pcmp.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mxl-pattern-compare" } */ > +/* { dg-options "-O3 -mcpu=v10.0 -mxl-pattern-compare" } */ > > volatile int m1, m2, m3; > volatile long l1, l2; > diff --git a/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c b/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c > index 1d6ba807b12..35824b6d077 100644 > --- a/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c > +++ b/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c > @@ -1,4 +1,4 @@ > -/* { dg-options "-O3 -mcpu=v6.00.a -mcpu=v6.00.a" } */ > +/* { dg-options "-O3 -mcpu=v10.0" } */ > > volatile int m1, m2, m3; > volatile long l1, l2; > diff --git a/gcc/testsuite/gcc.target/microblaze/microblaze.exp b/gcc/testsuite/gcc.target/microblaze/microblaze.exp > index 1c7b0e23353..33979ae5e42 100644 > --- a/gcc/testsuite/gcc.target/microblaze/microblaze.exp > +++ b/gcc/testsuite/gcc.target/microblaze/microblaze.exp > @@ -49,7 +49,7 @@ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/isa/*.\[cSi\]]] \ > ${default_c_flags} "" > > gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/others/*.\[cSi\]]] \ > - "" "-mcpu=v6.00.a" > + "" "-mcpu=v10.0" > > > # All done. -- Michael Eager