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From: Robin Dapp <rdapp.gcc@gmail.com>
To: yanzhang.wang@intel.com, gcc-patches@gcc.gnu.org
Cc: rdapp.gcc@gmail.com, juzhe.zhong@rivai.ai, kito.cheng@sifive.com,
	pan2.li@intel.com
Subject: Re: [PATCH] RISC-V: convert the mulh with 0 to mov 0 to the reg.
Date: Wed, 21 Jun 2023 08:27:50 +0200	[thread overview]
Message-ID: <5f87af5c-3571-1fd1-b52a-ff723dd30361@gmail.com> (raw)
In-Reply-To: <20230621060842.189680-1-yanzhang.wang@intel.com>

Hi Yanzhang,

while I appreciate the optimization, I'm a bit wary about just adding a special
case for "0".  Is that so common? Wouldn't we also like to have
  * pow2_p (val) == << val and others?

* 1 should also be covered.

Regards
 Robin

  parent reply	other threads:[~2023-06-21  6:27 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-21  6:08 yanzhang.wang
2023-06-21  6:20 ` juzhe.zhong
2023-06-21  6:54   ` Wang, Yanzhang
2023-06-21  6:23 ` juzhe.zhong
2023-06-21  6:27 ` Robin Dapp [this message]
2023-06-21  6:33   ` juzhe.zhong
2023-06-21  7:08     ` Wang, Yanzhang
2023-06-21  7:25       ` juzhe.zhong
2023-07-28 11:50 ` [PATCH v2] " yanzhang.wang
2023-07-28 12:00   ` Kito Cheng
2023-07-28 12:00   ` Wang, Yanzhang
2023-07-28 12:31     ` Robin Dapp
2023-07-28 23:07       ` Jeff Law
2023-07-31 12:14         ` Wang, Yanzhang
2023-07-31 15:48           ` Jeff Law

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