From: Jeff Law <jeffreyalaw@gmail.com>
To: YunQiang Su <syq@gcc.gnu.org>
Cc: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com,
pinskia@gmail.com, rguenther@suse.de
Subject: Re: [PATCH v3] EXPR: Emit an truncate if 31+ bits polluted for SImode
Date: Thu, 28 Dec 2023 11:11:57 -0700 [thread overview]
Message-ID: <61a5c2cf-ef9f-4c52-864b-d58683c15828@gmail.com> (raw)
In-Reply-To: <CAKcpw6X7KKavmmKf2rzmqKmWHqFfSuXfz14mLNFosngkW9_GXw@mail.gmail.com>
On 12/24/23 01:11, YunQiang Su wrote:
>>> Yes. I also guess so. Any new idea?
>> Well, I see multiple intertwined issues and I think MIPS has largely
>> mucked this up.
>>
>> At a high level DI -> SI truncation is not a nop on MIPS64. We must
>> explicitly sign extend the value from SI->DI to preserve the invariant
>> that SI mode objects are extended to DImode. If we fail to do that,
>> then the SImode conditional branch patterns simply aren't going to work.
>>
>
> MIPS64 never claims DI -> SI is nop, instead it claims SI -> DI is nop.
And that just seems wrong, at least for truncation which implies the
input precision must be larger than the output precision.
If you adjust the mips implementation of TARGET_TRULY_NOOP_TRUNCATION to
return false when the input precision is smaller than the output
precision, does that fix this problem?
> And for MIPS64, it has only one type of branch. it works for both SI and DI.
Agreed, but the SImode variant is really just a DImode comparison that
relies on the sign extending property of the MIPS architecture. I'm not
100% sure that's safe in the presence of bit manipulation instructions
which do not preserve the sign extending property. We actually don't
allow some bit manipulations on RV64 for a similar underlying reason.
>
> Converting from 32 to 64 does be nop, IF the 32 is properly sign extended.
But that's not a *truncation*, that's an *extension*.
Jeff
next prev parent reply other threads:[~2023-12-28 18:12 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-23 8:58 YunQiang Su
2023-12-23 16:51 ` Jeff Law
2023-12-23 22:46 ` YunQiang Su
2023-12-24 5:27 ` Jeff Law
2023-12-24 8:11 ` YunQiang Su
2023-12-28 18:11 ` Jeff Law [this message]
2024-01-03 23:39 ` Richard Sandiford
2024-01-09 18:49 ` Jeff Law
2023-12-24 0:49 Roger Sayle
2023-12-24 5:38 ` Jeff Law
2023-12-24 8:51 ` Roger Sayle
2023-12-24 9:15 ` YunQiang Su
2023-12-24 9:28 ` Andrew Pinski
2023-12-24 12:24 ` Roger Sayle
2023-12-28 18:26 ` Jeff Law
2023-12-24 8:29 ` YunQiang Su
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