From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 09B8E3858CDA for ; Thu, 18 Aug 2022 10:10:39 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 09B8E3858CDA Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 83CBF106F; Thu, 18 Aug 2022 03:10:39 -0700 (PDT) Received: from [10.57.13.41] (unknown [10.57.13.41]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 25CB93F70D; Thu, 18 Aug 2022 03:10:37 -0700 (PDT) Message-ID: <61a774dd-b182-5f74-0300-1ced92a3c08e@foss.arm.com> Date: Thu, 18 Aug 2022 11:10:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH, GCC, AARCH64, 5/6] Enable BTI : Add new pass for BTI. Content-Language: en-GB To: Andrew Pinski , Sudakshina Das Cc: nd , "gcc-patches@gcc.gnu.org" , Marcus Shawcroft , Richard Earnshaw References: From: Richard Earnshaw In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3490.6 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, NICE_REPLY_A, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Aug 2022 10:10:40 -0000 On 18/08/2022 01:00, Andrew Pinski via Gcc-patches wrote: > On Fri, Nov 2, 2018 at 11:39 AM Sudakshina Das wrote: >> >> Hi >> >> This patch is part of a series that enables ARMv8.5-A in GCC and >> adds Branch Target Identification Mechanism. >> (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools) >> >> This patch adds a new pass called "bti" which is triggered by the >> command line argument -mbranch-protection whenever "bti" is turned on. >> >> The pass iterates through the instructions and adds appropriated BTI >> instructions based on the following: >> * Add a new "BTI C" at the beginning of a function, unless its already >> protected by a "PACIASP/PACIBSP". We exempt the functions that are >> only called directly. > > Coming back to this because the check only_called_directly_p does not > work if the linker will insert a veneer as the compiler does not know > about that. > This is recorded as https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106671 . I think the linker has to make sure to insert a veneer that ends with a branch in that case. R. > > Thanks, > Andrew Pinski > > >> * Add a new "BTI J" for every target of an indirect jump, jump table >> targets, non-local goto targets or labels that might be referenced >> by variables, constant pools, etc (NOTE_INSN_DELETED_LABEL) >> >> Since we have already changed the use of indirect tail calls to only x16 >> and x17, we do not have to use "BTI JC". >> (check patch 3/6). >> >> Bootstrapped and regression tested with aarch64-none-linux-gnu. Added >> new tests. >> Is this ok for trunk? >> >> Thanks >> Sudi >> >> *** gcc/ChangeLog *** >> >> 2018-xx-xx Sudakshina Das >> Ramana Radhakrishnan >> >> * config.gcc (aarch64*-*-*): Add aarch64-bti-insert.o. >> * gcc/config/aarch64/aarch64.h: Update comment for >> TRAMPOLINE_SIZE. >> * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): >> Update if bti is enabled. >> * config/aarch64/aarch64-bti-insert.c: New file. >> * config/aarch64/aarch64-passes.def (INSERT_PASS_BEFORE): Insert >> bti pass. >> * config/aarch64/aarch64-protos.h (make_pass_insert_bti): >> Declare the new bti pass. >> * config/aarch64/aarch64.md (bti_nop): Define. >> * config/aarch64/t-aarch64: Add rule for aarch64-bti-insert.o. >> >> *** gcc/testsuite/ChangeLog *** >> >> 2018-xx-xx Sudakshina Das >> >> * gcc.target/aarch64/bti-1.c: New test. >> * gcc.target/aarch64/bti-2.c: New test. >> * lib/target-supports.exp >> (check_effective_target_aarch64_bti_hw): Add new check for >> BTI hw. >>