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From: Jeff Law <>
To: Philipp Tomsich <>
Cc:, Jeff Law <>,
	Palmer Dabbelt <>,
	Christoph Muellner <>,
	Kito Cheng <>,
	Vineet Gupta <>
Subject: Re: [PATCH] RISC-V: Optimize masking with two clear bits not a SMALL_OPERAND
Date: Thu, 17 Nov 2022 07:53:07 -0700	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

On 11/17/22 07:43, Philipp Tomsich wrote:
> On Thu, 17 Nov 2022 at 15:30, Jeff Law <> wrote:
>> On 11/10/22 14:36, Philipp Tomsich wrote:
>>> Add a split for cases where we can use two bclri (or one bclri and an
>>> andi) to clear two bits.
>>> gcc/ChangeLog:
>>>        * config/riscv/ (*bclri<mode>_nottwobits): New pattern.
>>>        (*bclridisi_nottwobits): New pattern, handling the sign-bit.
>>>        * config/riscv/ (const_nottwobits_operand):
>>>        New predicate.
>>> gcc/testsuite/ChangeLog:
>>>        * New test.
>> Don't we only have to worry about (subreg:DI (reg:SI )) to preserve the
>> extension constraints?  Not that I think there's any value in allowing
> That is the reason for the !paradoxical_subreg_p(...) check in
> "bclri<mode>_nottwobits"... so at pattern will always be safe.
> Do you see a risk on the "*bclridisi_nottwobits"?

It's jut a sanity check for me, I don't have any concerns since you're 
avoiding this when working on a paradoxical.  But it does make me wonder 
if we need a paradoxical check on the other bit twiddles patterns to 
prevent them from changing the SImode sign bit in a paradoxical.


  reply	other threads:[~2022-11-17 14:53 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-10 21:36 Philipp Tomsich
2022-11-17 14:30 ` Jeff Law
2022-11-17 14:43   ` Philipp Tomsich
2022-11-17 14:53     ` Jeff Law [this message]
2022-11-17 15:37   ` Philipp Tomsich

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