From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id CA7DD3856DD6 for ; Wed, 12 Oct 2022 08:12:32 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org CA7DD3856DD6 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 29C7Uq5E008746; Wed, 12 Oct 2022 08:12:31 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=message-id : date : mime-version : to : cc : from : subject : content-type : content-transfer-encoding; s=pp1; bh=kANbcjdB1wGFXtvOwap0l9eKPiT0+d9tVdeIHaAkpHs=; b=Loaajf6Ktv0IDB70y0036QeX/q4sWVI2iMgPW+ObZyHah7AlgkF251i/E0oNsEOtkQsW gCh5MM9fofnBzALNUskVSeu/h9rAHYSqxcnQoZytXr2yxFbhy6+JSei9f7HwRI8ToaiE khP0UUQbUZ/C/Wgwe1KvYCtRptdVoCQvvZepIqT3+5WOFaNDtfFcVuNxaETn/LfLi8OD J/JV5E6CJu6OwoUvbjipbYbWIOt5fBjTkp2G3CHIx+1npv77/N9/3VAqjGxQCoaXKI7A b7gxRZEVbGq6ztboiKpz6nrzPWq+rrCO05wH+t35y1I8ROCNTmWjusLh1Nb0d72HnSpb /g== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3k5s8ps7dc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Oct 2022 08:12:31 +0000 Received: from m0098404.ppops.net (m0098404.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 29C7vn4t001983; Wed, 12 Oct 2022 08:12:31 GMT Received: from ppma04ams.nl.ibm.com (63.31.33a9.ip4.static.sl-reverse.com [169.51.49.99]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3k5s8ps7c8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Oct 2022 08:12:30 +0000 Received: from pps.filterd (ppma04ams.nl.ibm.com [127.0.0.1]) by ppma04ams.nl.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 29C86cLp018490; Wed, 12 Oct 2022 08:12:28 GMT Received: from b06avi18878370.portsmouth.uk.ibm.com (b06avi18878370.portsmouth.uk.ibm.com [9.149.26.194]) by ppma04ams.nl.ibm.com with ESMTP id 3k30u9dn6s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Oct 2022 08:12:28 +0000 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06avi18878370.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 29C8CvsQ50659648 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 12 Oct 2022 08:12:57 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 160C4AE04D; Wed, 12 Oct 2022 08:12:26 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A0D74AE045; Wed, 12 Oct 2022 08:12:23 +0000 (GMT) Received: from [9.197.246.63] (unknown [9.197.246.63]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 12 Oct 2022 08:12:23 +0000 (GMT) Message-ID: <63afd344-38fa-7a8e-4958-8256c2a9bca7@linux.ibm.com> Date: Wed, 12 Oct 2022 16:12:21 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Content-Language: en-US To: GCC Patches Cc: Iain Sandoe , Segher Boessenkool , David Edelsohn , Peter Bergner From: "Kewen.Lin" Subject: [PATCH v2] rs6000: Rework option -mpowerpc64 handling [PR106680] Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: ZA1zi8FBswa0Vu7YhT12iejSvGqoa6Iq X-Proofpoint-GUID: Ns4evfJK5P7RupGLSTnV7rx5rh7XGfBf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-12_03,2022-10-11_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxlogscore=999 spamscore=0 phishscore=0 mlxscore=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 bulkscore=0 suspectscore=0 impostorscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210120052 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi, PR106680 shows that -m32 -mpowerpc64 is different from -mpowerpc64 -m32, this is determined by the way how we handle option powerpc64 in rs6000_handle_option. Segher pointed out this difference should be taken as a bug and we should ensure that option powerpc64 is independent of -m32/-m64. So this patch removes the handlings in rs6000_handle_option and add some necessary supports in rs6000_option_override_internal instead. With this patch, if users specify -m{no-,}powerpc64, the specified value is honoured, otherwise, for 64bit it always enables OPTION_MASK_POWERPC64; while for 32bit and TARGET_POWERPC64 and OS_MISSING_POWERPC64, it disables OPTION_MASK_POWERPC64. btw, following Segher's suggestion, I did some tries to warn when OPTION_MASK_POWERPC64 is set for OS_MISSING_POWERPC64. If warn for the case that powerpc64 is specified explicitly, there are some TCs using -m32 -mpowerpc64 on ppc64-linux, they need some updates, meanwhile the artificial run with "--target_board=unix'{-m32/-mpowerpc64}'" will have noisy warnings on ppc64-linux. If warn for the case that it's specified implicitly, they can just be initialized by TARGET_DEFAULT (like -m32 on ppc64-linux) or set from the given cpu mask, we have to special case them and not to warn. As Segher's latest comment, I decide not to warn them and keep it consistent with before. Bootstrapped and regress-tested on: - powerpc64-linux-gnu P7 and P8 {-m64,-m32} - powerpc64le-linux-gnu P9 and P10 - powerpc-ibm-aix7.2.0.0 {-maix64,-maix32} Hi Iain, could you help to test this new patch on darwin again? Thanks in advance! Is it ok for trunk if darwin testing goes well? BR, Kewen ----- PR target/106680 gcc/ChangeLog: * common/config/rs6000/rs6000-common.cc (rs6000_handle_option): Remove the adjustment for option powerpc64 in -m64 handling, and remove the whole -m32 handling. * config/rs6000/rs6000.cc (rs6000_option_override_internal): When no explicit powerpc64 option is provided, enable it for -m64. For 32 bit and OS_MISSING_POWERPC64, disable powerpc64 if it's enabled but not specified explicitly. gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr106680-1.c: New test. * gcc.target/powerpc/pr106680-2.c: New test. * gcc.target/powerpc/pr106680-3.c: New test. * gcc.target/powerpc/pr106680-4.c: New test. 2022-10-12 Kewen Lin Iain Sandoe --- gcc/common/config/rs6000/rs6000-common.cc | 11 ------ gcc/config/rs6000/rs6000.cc | 37 ++++++++++++++----- gcc/testsuite/gcc.target/powerpc/pr106680-1.c | 13 +++++++ gcc/testsuite/gcc.target/powerpc/pr106680-2.c | 14 +++++++ gcc/testsuite/gcc.target/powerpc/pr106680-3.c | 13 +++++++ gcc/testsuite/gcc.target/powerpc/pr106680-4.c | 17 +++++++++ 6 files changed, 85 insertions(+), 20 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr106680-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr106680-2.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr106680-3.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr106680-4.c diff --git a/gcc/common/config/rs6000/rs6000-common.cc b/gcc/common/config/rs6000/rs6000-common.cc index 8e393d08a23..c76b5c27bb6 100644 --- a/gcc/common/config/rs6000/rs6000-common.cc +++ b/gcc/common/config/rs6000/rs6000-common.cc @@ -119,19 +119,8 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set, #else case OPT_m64: #endif - opts->x_rs6000_isa_flags |= OPTION_MASK_POWERPC64; opts->x_rs6000_isa_flags |= (~opts_set->x_rs6000_isa_flags & OPTION_MASK_PPC_GFXOPT); - opts_set->x_rs6000_isa_flags |= OPTION_MASK_POWERPC64; - break; - -#ifdef TARGET_USES_AIX64_OPT - case OPT_maix32: -#else - case OPT_m32: -#endif - opts->x_rs6000_isa_flags &= ~OPTION_MASK_POWERPC64; - opts_set->x_rs6000_isa_flags |= OPTION_MASK_POWERPC64; break; case OPT_mminimal_toc: diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index e6fa3ad0eb7..e37d99deb61 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -3648,17 +3648,12 @@ rs6000_option_override_internal (bool global_init_p) rs6000_pointer_size = 32; } - /* Some OSs don't support saving the high part of 64-bit registers on context - switch. Other OSs don't support saving Altivec registers. On those OSs, - we don't touch the OPTION_MASK_POWERPC64 or OPTION_MASK_ALTIVEC settings; - if the user wants either, the user must explicitly specify them and we - won't interfere with the user's specification. */ + /* Some OSs don't support saving Altivec registers. On those OSs, we don't + touch the OPTION_MASK_ALTIVEC settings; if the user wants it, the user + must explicitly specify it and we won't interfere with the user's + specification. */ set_masks = POWERPC_MASKS; -#ifdef OS_MISSING_POWERPC64 - if (OS_MISSING_POWERPC64) - set_masks &= ~OPTION_MASK_POWERPC64; -#endif #ifdef OS_MISSING_ALTIVEC if (OS_MISSING_ALTIVEC) set_masks &= ~(OPTION_MASK_ALTIVEC | OPTION_MASK_VSX @@ -3668,6 +3663,18 @@ rs6000_option_override_internal (bool global_init_p) /* Don't override by the processor default if given explicitly. */ set_masks &= ~rs6000_isa_flags_explicit; + /* Without option powerpc64 specified explicitly, we need to ensure + powerpc64 always enabled for 64 bit here, otherwise some following + checks can use unexpected TARGET_POWERPC64 value. Meanwhile, we + need to ensure set_masks doesn't have OPTION_MASK_POWERPC64 on, + otherwise later processing can clear it. */ + if (!(rs6000_isa_flags_explicit & OPTION_MASK_POWERPC64) + && TARGET_64BIT) + { + rs6000_isa_flags |= OPTION_MASK_POWERPC64; + set_masks &= ~OPTION_MASK_POWERPC64; + } + /* Process the -mcpu= and -mtune= argument. If the user changed the cpu in a target attribute or pragma, but did not specify a tuning option, use the cpu for the tuning option rather than the option specified @@ -3718,6 +3725,18 @@ rs6000_option_override_internal (bool global_init_p) rs6000_isa_flags |= (flags & ~rs6000_isa_flags_explicit); } + /* Don't expect powerpc64 enabled on those OSes with OS_MISSING_POWERPC64, + since they don't support saving the high part of 64-bit registers on + context switch. If the user explicitly specifies it, we won't interfere + with the user's specification. */ +#ifdef OS_MISSING_POWERPC64 + if (OS_MISSING_POWERPC64 + && TARGET_32BIT + && TARGET_POWERPC64 + && !(rs6000_isa_flags_explicit & OPTION_MASK_POWERPC64)) + rs6000_isa_flags &= ~OPTION_MASK_POWERPC64; +#endif + if (rs6000_tune_index >= 0) tune_index = rs6000_tune_index; else if (cpu_index >= 0) diff --git a/gcc/testsuite/gcc.target/powerpc/pr106680-1.c b/gcc/testsuite/gcc.target/powerpc/pr106680-1.c new file mode 100644 index 00000000000..d624d43230a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr106680-1.c @@ -0,0 +1,13 @@ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-mno-powerpc64" } */ + +/* Verify there is an error message about PowerPC64 requirement. */ + +int foo () +{ + return 1; +} + +/* { dg-error "'-m64' requires a PowerPC64 cpu" "PR106680" { target powerpc*-*-linux* powerpc*-*-freebsd* powerpc-*-rtems* } 0 } */ +/* { dg-warning "'-m64' requires PowerPC64 architecture, enabling" "PR106680" { target powerpc*-*-darwin* } 0 } */ +/* { dg-warning "'-maix64' requires PowerPC64 architecture remain enabled" "PR106680" { target powerpc*-*-aix* } 0 } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr106680-2.c b/gcc/testsuite/gcc.target/powerpc/pr106680-2.c new file mode 100644 index 00000000000..a9ed73726ef --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr106680-2.c @@ -0,0 +1,14 @@ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-mno-powerpc64 -m64" } */ + +/* Verify option -m64 doesn't override option -mno-powerpc64, + and there is an error message about PowerPC64 requirement. */ + +int foo () +{ + return 1; +} + +/* { dg-error "'-m64' requires a PowerPC64 cpu" "PR106680" { target powerpc*-*-linux* powerpc*-*-freebsd* powerpc-*-rtems* } 0 } */ +/* { dg-warning "'-m64' requires PowerPC64 architecture, enabling" "PR106680" { target powerpc*-*-darwin* } 0 } */ +/* { dg-warning "'-maix64' requires PowerPC64 architecture remain enabled" "PR106680" { target powerpc*-*-aix* } 0 } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr106680-3.c b/gcc/testsuite/gcc.target/powerpc/pr106680-3.c new file mode 100644 index 00000000000..b642d5c7a00 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr106680-3.c @@ -0,0 +1,13 @@ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-m64 -mno-powerpc64" } */ + +/* Verify there is an error message about PowerPC64 requirement. */ + +int foo () +{ + return 1; +} + +/* { dg-error "'-m64' requires a PowerPC64 cpu" "PR106680" { target powerpc*-*-linux* powerpc*-*-freebsd* powerpc-*-rtems* } 0 } */ +/* { dg-warning "'-m64' requires PowerPC64 architecture, enabling" "PR106680" { target powerpc*-*-darwin* } 0 } */ +/* { dg-warning "'-maix64' requires PowerPC64 architecture remain enabled" "PR106680" { target powerpc*-*-aix* } 0 } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr106680-4.c b/gcc/testsuite/gcc.target/powerpc/pr106680-4.c new file mode 100644 index 00000000000..7fee48d39f3 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr106680-4.c @@ -0,0 +1,17 @@ +/* Skip this on aix, otherwise it emits the error message like "64-bit + computation with 32-bit addressing not yet supported" on aix. */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-require-effective-target ilp32 } */ +/* { dg-options "-mpowerpc64 -m32 -O2" } */ + +/* Verify option -m32 doesn't override option -mpowerpc64. + If option -mpowerpc64 gets overridden, the assembly would + end up with addc and adde. */ +/* { dg-final { scan-assembler-not {\maddc\M} } } */ +/* { dg-final { scan-assembler-not {\madde\M} } } */ +/* { dg-final { scan-assembler-times {\madd\M} 1 } } */ + +long long foo (long long a, long long b) +{ + return a+b; +} -- 2.27.0