From: Jeff Law <law@redhat.com>
To: "Maciej W. Rozycki" <macro@linux-mips.org>, gcc-patches@gcc.gnu.org
Cc: Anders Magnusson <ragge@tethuvudet.se>,
Paul Koning <ni1d@arrl.net>, Matt Thomas <matt@3am-software.com>
Subject: Re: [PATCH 22/31] VAX: Ensure PIC mode address is adjustable with aligned bitfield insns
Date: Sat, 21 Nov 2020 10:03:06 -0700 [thread overview]
Message-ID: <63d75f9a-3832-4d21-3901-3c80509787d5@redhat.com> (raw)
In-Reply-To: <alpine.LFD.2.21.2011200256200.656242@eddie.linux-mips.org>
On 11/19/20 8:35 PM, Maciej W. Rozycki wrote:
> With the `*insv_aligned', `*extzv_aligned' and `*extv_aligned' insns we
> are going to adjust the bitfield location if it is in memory, so only
> allow such location addresses that can be offset, excluding external
> symbol references in the PIC mode in particular.
>
> This fixes an ICE like:
>
> during RTL pass: final
> In file included from .../gcc/testsuite/gcc.dg/torture/vshuf-v16qi.c:11:
> .../gcc/testsuite/gcc.dg/torture/vshuf-main.inc: In function 'test_13':
> .../gcc/testsuite/gcc.dg/torture/vshuf-main.inc:27:1: internal compiler error: in change_address_1, at emit-rtl.c:2275
> .../gcc/testsuite/gcc.dg/torture/vshuf-16.inc:16:1: note: in expansion of macro 'T'
> .../gcc/testsuite/gcc.dg/torture/vshuf-main.inc:28:1: note: in expansion of macro 'TESTS'
> 0x10a34b33 change_address_1
> .../gcc/emit-rtl.c:2275
> 0x10a358af adjust_address_1(rtx_def*, machine_mode, poly_int<1u, long>, int, int, int, poly_int<1u, long>)
> .../gcc/emit-rtl.c:2409
> 0x11d2505f output_97
> .../gcc/config/vax/vax.md:806
> 0x10adec4b get_insn_template(int, rtx_insn*)
> .../gcc/final.c:2070
> 0x10ae1c5b final_scan_insn_1
> .../gcc/final.c:3039
> 0x10ae2257 final_scan_insn(rtx_insn*, _IO_FILE*, int, int, int*)
> .../gcc/final.c:3152
> 0x10ade9a3 final_1
> .../gcc/final.c:2020
> 0x10ae6157 rest_of_handle_final
> .../gcc/final.c:4658
> 0x10ae6697 execute
> .../gcc/final.c:4736
> Please submit a full bug report,
> with preprocessed source if appropriate.
> Please include the complete backtrace with any bug report.
> See <https://gcc.gnu.org/bugs/> for instructions.
> compiler exited with status 1
> FAIL: gcc.dg/torture/vshuf-v16qi.c -O2 (internal compiler error)
>
> triggered by an RTL instruction like:
>
> (insn 97 96 98 (set (reg:SI 5 %r5 [88])
> (zero_extract:SI (mem/c:SI (symbol_ref:SI ("b") <var_decl 0x7ffff7f801b0 b>) [0 b+0 S4 A128])
> (const_int 8 [0x8])
> (const_int 24 [0x18]))) ".../gcc/testsuite/gcc.dg/torture/vshuf-main.inc":28:1 97 {*extzv_aligned}
> (nil))
>
> and removes these regressions:
>
> FAIL: gcc.dg/torture/vshuf-v16qi.c -O2 (internal compiler error)
> FAIL: gcc.dg/torture/vshuf-v16qi.c -O2 (test for excess errors)
> FAIL: gcc.dg/torture/vshuf-v4hi.c -O2 (internal compiler error)
> FAIL: gcc.dg/torture/vshuf-v4hi.c -O2 (test for excess errors)
> FAIL: gcc.dg/torture/vshuf-v8hi.c -O2 (internal compiler error)
> FAIL: gcc.dg/torture/vshuf-v8hi.c -O2 (test for excess errors)
> FAIL: gcc.dg/torture/vshuf-v8qi.c -O2 (internal compiler error)
> FAIL: gcc.dg/torture/vshuf-v8qi.c -O2 (test for excess errors)
>
> However expand typically presents pseudo-registers rather than memory
> references to these insns, so a further rework is required to make a
> better use of the code variant they are supposed to produce. This at
> least fixes the problem at hand.
>
> gcc/
> * config/vax/vax.md (*insv_aligned, *extzv_aligned)
> (*extv_aligned): Also make sure the memory address of a bitfield
> location can be adjusted in the PIC mode.
OK
jeff
next prev parent reply other threads:[~2020-11-21 17:03 UTC|newest]
Thread overview: 117+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-20 3:38 [PATCH 00/31] VAX: Bring the port up to date (yes, MODE_CC conversion is included) Maciej W. Rozycki
2020-11-20 3:34 ` [PATCH 01/31] PR target/58901: reload: Handle SUBREG of MEM with a mode-dependent address Maciej W. Rozycki
2020-11-20 10:55 ` Eric Botcazou
2020-11-20 15:30 ` Maciej W. Rozycki
2020-11-24 6:19 ` [PATCH v2 " Maciej W. Rozycki
2020-11-24 11:03 ` Eric Botcazou
2020-11-26 17:22 ` Maciej W. Rozycki
2020-11-27 3:51 ` Maciej W. Rozycki
2020-11-27 10:52 ` Ulrich Weigand
2020-11-27 19:22 ` Maciej W. Rozycki
2020-11-27 20:47 ` Maciej W. Rozycki
2020-11-27 20:50 ` [PATCH v3 " Maciej W. Rozycki
2020-11-30 18:51 ` Jeff Law
2020-11-29 17:31 ` [PATCH v2 " Jeff Law
2020-11-20 3:34 ` [PATCH 02/31] VAX: Remove `c' operand format specifier overload Maciej W. Rozycki
2020-11-20 23:16 ` Jeff Law
2020-11-24 1:12 ` Segher Boessenkool
2020-11-20 3:34 ` [PATCH 03/31] VAX: Define LEGITIMATE_PIC_OPERAND_P Maciej W. Rozycki
2020-11-21 3:17 ` Jeff Law
2020-11-20 3:34 ` [PATCH 04/31] VAX/testsuite: Run target testing over all the usual optimization levels Maciej W. Rozycki
2020-11-20 23:17 ` Jeff Law
2020-11-20 3:34 ` [PATCH 05/31] VAX: Rationalize expression and address costs Maciej W. Rozycki
2020-11-21 3:48 ` Jeff Law
2020-11-20 3:34 ` [PATCH 06/31] VAX: Correct fatal issues with the `ffs' builtin Maciej W. Rozycki
2020-11-20 23:19 ` Jeff Law
2020-11-20 3:34 ` [PATCH 07/31] RTL: Also support HOST_WIDE_INT with int iterators Maciej W. Rozycki
2020-11-21 4:19 ` Jeff Law
2020-11-20 3:34 ` [PATCH 08/31] jump: Also handle jumps wrapped in UNSPEC or UNSPEC_VOLATILE Maciej W. Rozycki
2020-11-21 4:25 ` Jeff Law
2020-12-03 3:50 ` [PATCH v2 " Maciej W. Rozycki
2020-12-03 22:20 ` Jeff Law
2020-11-20 3:34 ` [PATCH 09/31] VAX: Use a mode iterator to produce individual interlocked branches Maciej W. Rozycki
2020-11-20 23:20 ` Jeff Law
2020-11-20 3:34 ` [PATCH 10/31] VAX: Use an int " Maciej W. Rozycki
2020-11-20 23:20 ` Jeff Law
2020-11-20 3:35 ` [PATCH 11/31] VAX: Correct `sync_lock_test_and_set' and `sync_lock_release' builtins Maciej W. Rozycki
2020-11-21 4:26 ` Jeff Law
2020-11-20 3:35 ` [PATCH 12/31] VAX: Actually enable `builtins.md' now that it is fully functional Maciej W. Rozycki
2020-11-20 23:21 ` Jeff Law
2020-11-20 3:35 ` [PATCH 13/31] VAX: Add a test for the SImode `ffs' operation Maciej W. Rozycki
2020-11-20 23:22 ` Jeff Law
2020-11-20 3:35 ` [PATCH 14/31] VAX: Add tests for `sync_lock_test_and_set' and `sync_lock_release' Maciej W. Rozycki
2020-11-20 23:22 ` Jeff Law
2020-11-20 3:35 ` [PATCH 15/31] VAX: Provide the `ctz' operation Maciej W. Rozycki
2020-11-20 23:23 ` Jeff Law
2020-11-20 3:35 ` [PATCH 16/31] VAX: Also provide QImode and HImode `ctz' and `ffs' operations Maciej W. Rozycki
2020-11-20 23:24 ` Jeff Law
2020-11-20 3:35 ` [PATCH 17/31] VAX: Actually produce QImode and HImode `ctz' operations Maciej W. Rozycki
2020-11-20 23:24 ` Jeff Law
2020-11-20 3:35 ` [PATCH 18/31] VAX: Add a test for the `cpymemhi' instruction Maciej W. Rozycki
2020-11-20 23:25 ` Jeff Law
2020-11-20 3:35 ` [PATCH 19/31] VAX: Add the `movmemhi' instruction Maciej W. Rozycki
2020-11-20 23:25 ` Jeff Law
2020-11-20 3:35 ` [PATCH 20/31] VAX: Fix predicates and constraints for EXTV/EXTZV/INSV insns Maciej W. Rozycki
2020-11-21 17:01 ` Jeff Law
2020-11-20 3:35 ` [PATCH 21/31] VAX: Remove EXTV/EXTZV/INSV instruction use from aligned case insns Maciej W. Rozycki
2020-11-21 17:25 ` Jeff Law
2020-11-20 3:35 ` [PATCH 22/31] VAX: Ensure PIC mode address is adjustable with aligned bitfield insns Maciej W. Rozycki
2020-11-21 17:03 ` Jeff Law [this message]
2020-11-20 3:36 ` [PATCH 23/31] VAX: Make `extv' an expander matching the remaining bitfield operations Maciej W. Rozycki
2020-11-21 17:26 ` Jeff Law
2020-11-20 3:36 ` [PATCH 24/31] VAX: Fix predicates and constraints for bitfield comparison insns Maciej W. Rozycki
2020-11-21 17:27 ` Jeff Law
2020-11-20 3:36 ` [PATCH 25/31] VAX: Fix predicates for widening multiply and multiply-add insns Maciej W. Rozycki
2020-11-21 4:05 ` Jeff Law
2020-11-30 16:02 ` Maciej W. Rozycki
2020-11-30 18:29 ` Jeff Law
2020-11-20 3:36 ` [PATCH 26/31] VAX: Correct issues with commented-out insns Maciej W. Rozycki
2020-11-21 4:05 ` Jeff Law
2020-11-20 3:36 ` [PATCH 27/31] VAX: Make the `divmoddisi4' and `*amulsi4' comment notation consistent Maciej W. Rozycki
2020-11-21 4:06 ` Jeff Law
2020-11-24 1:37 ` Segher Boessenkool
2020-11-20 3:36 ` [PATCH 28/31] RTL: Add `const_double_zero' syntactic rtx Maciej W. Rozycki
2020-11-21 17:29 ` Jeff Law
2020-11-20 3:36 ` [PATCH 29/31] PDP11: Use `const_double_zero' to express double zero constant Maciej W. Rozycki
2020-11-21 4:07 ` Jeff Law
2020-12-15 8:26 ` Martin Liška
2020-12-15 14:06 ` Maciej W. Rozycki
2020-12-15 18:02 ` Paul Koning
2020-12-15 18:38 ` Maciej W. Rozycki
2020-11-20 3:36 ` [PATCH 30/31] PR target/95294: VAX: Convert backend to MODE_CC representation Maciej W. Rozycki
2020-11-22 3:27 ` Jeff Law
2020-12-09 16:09 ` Maciej W. Rozycki
2020-11-20 3:37 ` [PATCH 31/31] PR target/95294: VAX: Add test cases for " Maciej W. Rozycki
2020-11-21 4:08 ` Jeff Law
2020-12-05 18:40 ` Maciej W. Rozycki
2020-11-20 7:58 ` [PATCH 00/31] VAX: Bring the port up to date (yes, MODE_CC conversion is included) Anders Magnusson
2020-11-23 20:31 ` Maciej W. Rozycki
2020-11-21 21:02 ` Toon Moene
2020-11-23 21:51 ` Maciej W. Rozycki
2020-11-23 22:12 ` Thomas Koenig
2020-11-24 4:28 ` Maciej W. Rozycki
2020-11-24 5:27 ` Maciej W. Rozycki
2020-11-24 6:04 ` Maciej W. Rozycki
2020-11-24 6:16 ` Thomas Koenig
2020-11-25 19:22 ` Maciej W. Rozycki
2020-11-25 18:26 ` Maciej W. Rozycki
2020-11-25 22:20 ` Joseph Myers
2020-11-26 18:01 ` Maciej W. Rozycki
2020-11-26 18:08 ` Martin Husemann
2020-12-08 14:38 ` Maciej W. Rozycki
2020-12-08 15:22 ` Martin Husemann
2020-11-25 22:26 ` coypu
2020-11-26 17:59 ` Maciej W. Rozycki
2020-11-26 19:35 ` Maciej W. Rozycki
2020-11-23 15:48 ` Paul Koning
2020-11-25 17:07 ` Maciej W. Rozycki
2020-11-28 18:48 ` Paul Koning
2020-12-09 14:06 ` Maciej W. Rozycki
2020-12-10 1:33 ` Paul Koning
2020-12-11 14:54 ` Maciej W. Rozycki
2020-12-11 21:50 ` Paul Koning
2020-11-25 18:36 ` Maciej W. Rozycki
2020-11-26 14:46 ` Ian Lance Taylor
2020-11-26 18:07 ` Maciej W. Rozycki
2020-11-29 17:56 ` Martin Sebor
2020-12-07 14:25 ` Maciej W. Rozycki
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