From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 554593858403 for ; Wed, 15 Sep 2021 12:49:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 554593858403 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DD31031B; Wed, 15 Sep 2021 05:49:09 -0700 (PDT) Received: from [10.57.22.219] (unknown [10.57.22.219]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6058D3F719; Wed, 15 Sep 2021 05:49:09 -0700 (PDT) Subject: Re: [PATCH] testsuite: Make sure double-precision is supported in g++.dg/eh/arm-vfp-unwind.C To: Christophe LYON , gcc-patches@gcc.gnu.org References: <20210826155310.4039951-1-christophe.lyon@foss.st.com> <7788bf43-7afc-59d6-7995-c6fb4ad6eefb@foss.arm.com> <9f36198e-e341-dc91-55a1-47cdfcef9a45@foss.st.com> From: Richard Earnshaw Message-ID: <6652c071-d59d-cd94-4bf7-d3b5b885b85a@foss.arm.com> Date: Wed, 15 Sep 2021 13:49:08 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <9f36198e-e341-dc91-55a1-47cdfcef9a45@foss.st.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-3496.9 required=5.0 tests=BAYES_00, BODY_8BITS, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, NICE_REPLY_A, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Sep 2021 12:49:11 -0000 On 15/09/2021 13:26, Christophe LYON via Gcc-patches wrote: > > On 15/09/2021 13:02, Richard Earnshaw wrote: >> >> >> On 26/08/2021 16:53, Christophe Lyon via Gcc-patches wrote: >>> g++.dg/eh/arm-vfp-unwind.C uses an asm statement relying on >>> double-precision FPU support, but does not make sure it is actually >>> supported by the target. >>> Check (__ARM_FP & 8) to ensure this. >>> >>> 2021-08-26  Christophe Lyon  >>> >>>     gcc/testsuite/ >>>     * g++.dg/eh/arm-vfp-unwind.C: Check __ARM_FP. >>> --- >>>   gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C | 2 +- >>>   1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C >>> b/gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C >>> index 62263c0c3b0..90d20081d78 100644 >>> --- a/gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C >>> +++ b/gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C >>> @@ -3,7 +3,7 @@ >>>     /* Test to catch off-by-one errors in arm/pr-support.c.  */ >>>   -#if defined (__VFP_FP__) && !defined (__SOFTFP__) >>> +#if defined (__VFP_FP__) && !defined (__SOFTFP__) && (__ARM_FP & 8) >>>     #include >>>   #include >>> >> >> Wouldn't it be better to have an alternate to the asm for the case >> where we only have single-precision float?  Something like (untested): >> >> static void donkey () >> { >> #if __ARM_FP & 8 >>   asm volatile ("fcpyd d9, %P0" : : "w" (1.2345) : "d9"); >> #else >>   asm volatile ("fcpys s18, %P0" : : "w" (1.2345f) : "s18"); >> #endif >>   throw 1; >> } > > > I tried similar things but they failed on some testing configurations. > > Let me try your version, I'll let you know if there is any fallout. Of course, the asm syntax should be converted to the new 'unified syntax' form ie vmov.f{32,64}. R. > > Christophe > > >> >> R.