From: guojiufu <guojiufu@linux.ibm.com>
To: "Kewen.Lin" <linkw@linux.ibm.com>
Cc: segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org,
rguenther@suse.de, jeffreyalaw@gmail.com,
gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] PR testsuite/106879 FAIL: gcc.dg/vect/bb-slp-layout-19.c on powerpc64
Date: Thu, 20 Apr 2023 12:37:15 +0800 [thread overview]
Message-ID: <66e60d03e16bbecad33c3ebf6a2bb54e@linux.ibm.com> (raw)
In-Reply-To: <4c9eba2a-28ec-a463-ab0b-5daab8d382d7@linux.ibm.com>
Hi Kewen,
On 2023-04-19 10:53, Kewen.Lin wrote:
> Hi Jeff,
>
> on 2023/4/19 10:03, Jiufu Guo wrote:
>> Hi,
>>
>> On P7, option -mno-allow-movmisalign is added during testing, which
>> prevents slp happen on the case.
>>
>> Like Like PR65484 and PR87306, this patch use vect_hw_misalig to guard
> Dup like... ~~ missing the last
> character n.
Always thanks for your helpful catching and comments!
Committed via r14-105-g57e7229a29ca0e.
BR,
Jeff (Jiufu)
>
>> the case on powerpc targets.
>>
>> Tested on ppc64{le,} and x86_64.
>> Is this ok for trunk?
>>
>> BR,
>> Jeff (Jiufu)
>>
>> gcc/testsuite/ChangeLog:
>>
>> PR testsuite/106879
>> * gcc.dg/vect/bb-slp-layout-19.c: Modify to guard the check with
>> vect_hw_misalig on POWERs.
> ... ~~~~~ Same here.
>
> OK for trunk with these nits fixed, thanks!
>
> BR,
> Kewen
>
>>
>> ---
>> gcc/testsuite/gcc.dg/vect/bb-slp-layout-19.c | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-layout-19.c
>> b/gcc/testsuite/gcc.dg/vect/bb-slp-layout-19.c
>> index f075a83a25b..faf98e8d3c0 100644
>> --- a/gcc/testsuite/gcc.dg/vect/bb-slp-layout-19.c
>> +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-layout-19.c
>> @@ -31,4 +31,9 @@ void f()
>> e[3] = b3;
>> }
>>
>> -/* { dg-final { scan-tree-dump-times "add new stmt: \[^\\n\\r\]* =
>> VEC_PERM_EXPR" 3 "slp1" { target { vect_int_mult && vect_perm } } } }
>> */
>> +/* On older powerpc hardware (POWER7 and earlier), the default flag
>> + -mno-allow-movmisalign prevents vectorization. On POWER8 and
>> later,
>> + when vect_hw_misalign is true, vectorization occurs. For other
>> + targets, ! vect_no_align is a sufficient test. */
>> +
>> +/* { dg-final { scan-tree-dump-times "add new stmt: \[^\\n\\r\]* =
>> VEC_PERM_EXPR" 3 "slp1" { target { { vect_int_mult && vect_perm } && {
>> { ! powerpc*-*-* } || { vect_hw_misalign } } } } } } */
prev parent reply other threads:[~2023-04-20 4:37 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-19 2:03 Jiufu Guo
2023-04-19 2:53 ` Kewen.Lin
2023-04-20 4:37 ` guojiufu [this message]
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