From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 31825 invoked by alias); 7 Sep 2012 06:31:09 -0000 Received: (qmail 31813 invoked by uid 22791); 7 Sep 2012 06:31:07 -0000 X-SWARE-Spam-Status: No, hits=-4.2 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,KHOP_THREADED,RCVD_IN_HOSTKARMA_W,RCVD_IN_HOSTKARMA_WL X-Spam-Check-By: sourceware.org Received: from na3sys009aog124.obsmtp.com (HELO na3sys009aog124.obsmtp.com) (74.125.149.151) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 07 Sep 2012 06:30:54 +0000 Received: from SC-OWA01.marvell.com ([65.219.4.129]) (using TLSv1) by na3sys009aob124.postini.com ([74.125.148.12]) with SMTP ID DSNKUEmUmyy91TJw6jnkF7r46qMyqmA0f3rf@postini.com; Thu, 06 Sep 2012 23:30:54 PDT Received: from sc-owa02.marvell.com (10.93.76.22) by sc-owa01.marvell.com (10.93.76.21) with Microsoft SMTP Server (TLS) id 8.3.213.0; Thu, 6 Sep 2012 23:30:06 -0700 Received: from SC-vEXCH2.marvell.com ([10.93.76.134]) by sc-owa02.marvell.com ([10.93.76.22]) with mapi; Thu, 6 Sep 2012 23:30:06 -0700 From: Yi-Hsiu Hsu To: "gcc-patches@gcc.gnu.org" CC: Ramana Radhakrishnan , Chung-Lin Tang Date: Fri, 07 Sep 2012 06:31:00 -0000 Subject: PING: [PATCH, ARM] New CPU support for Marvell PJ4 cores Message-ID: <689C75E0D210324F8BE88961219F681624B645FC6D@SC-VEXCH2.marvell.com> References: <689C75E0D210324F8BE88961219F681624B5949520@SC-VEXCH2.marvell.com> <689C75E0D210324F8BE88961219F681624B5BCD276@SC-VEXCH2.marvell.com> <689C75E0D210324F8BE88961219F681624B5C54D1C@SC-VEXCH2.marvell.com> <4FE93674.5070409@codesourcery.com> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2012-09/txt/msg00446.txt.bz2 Ping!! Cheers, Yi-Hsiu, Hsu -----Original Message----- From: Yi-Hsiu Hsu=20 Sent: Tuesday, June 26, 2012 1:51 PM To: 'Chung-Lin Tang' Cc: Ramana Radhakrishnan; gcc-patches@gcc.gnu.org Subject: RE: [PATCH, ARM] New CPU support for Marvell PJ4 cores Hi Chung-Lin, I think tune_marvell attribute better be kept for future Marvell cores exte= nsion. Thanks! B.R. Yi-Hsiu, Hsu -----Original Message----- From: Chung-Lin Tang [mailto:cltang@codesourcery.com] Sent: Tuesday, June 26, 2012 12:12 PM To: Yi-Hsiu Hsu Cc: Ramana Radhakrishnan; gcc-patches@gcc.gnu.org Subject: Re: [PATCH, ARM] New CPU support for Marvell PJ4 cores On 2012/6/26 09:37 AM, Yi-Hsiu Hsu wrote: > Updated changelog. >=20 > * config/arm/marvell-pj4.md: New marvell-pj4 pipeline description. > * config/arm/arm.c (arm_issue_rate): Add marvell_pj4. > * config/arm/arm.md (tune_marvell): Add marvell_pj4. > * config/arm/arm-cores.def: Add core marvell-pj4. > * config/arm/arm-tune.md: Regenerated. > * config/arm/arm-tables.opt: Regenerated. > * config/arm/bpabi.h (BE8_LINK_SPEC): Add marvell_pj4. > * doc/invoke.texi: Added entry for marvell-pj4. Another nit, I think the tune_marvell attribute now looks a bit unneeded. Y= ou can just fold it into the "tune" clause of "generic_sched". Thanks, Chung-Lin