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[192.0.143.139]) by smtp.gmail.com with ESMTPSA id z4-20020a05620a100400b00767303dc070sm432030qkj.8.2023.09.14.05.09.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Sep 2023 05:09:28 -0700 (PDT) Message-ID: <69b3b8de-c7b0-6993-2f61-ba63a4600687@redhat.com> Date: Thu, 14 Sep 2023 08:09:27 -0400 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH 01/13] [APX EGPR] middle-end: Add insn argument to base_reg_class To: Hongyu Wang Cc: Hongyu Wang , gcc-patches@gcc.gnu.org, jakub@redhat.com, hongtao.liu@intel.com References: <20230831082024.314097-1-hongyu.wang@intel.com> <20230831082024.314097-2-hongyu.wang@intel.com> From: Vladimir Makarov In-Reply-To: X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00,BODY_8BITS,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 9/10/23 00:49, Hongyu Wang wrote: > Vladimir Makarov via Gcc-patches 于2023年9月9日周六 01:04写道： >> >> On 8/31/23 04:20, Hongyu Wang wrote: >>> @@ -2542,6 +2542,8 @@ the code of the immediately enclosing expression (@code{MEM} for the top level >>> of an address, @code{ADDRESS} for something that occurs in an >>> @code{address_operand}). @var{index_code} is the code of the corresponding >>> index expression if @var{outer_code} is @code{PLUS}; @code{SCRATCH} otherwise. >>> +@code{insn} indicates insn specific base register class should be subset >>> +of the original base register class. >>> @end defmac >> I'd prefer more general description of 'insn' argument for the macros. >> Something like that: >> >> @code{insn} can be used to define an insn-specific base register class. >> > Sure, will adjust in the V2 patch. > Also, currently we reuse the old macro MODE_CODE_BASE_REG_CLASS, do > you think we need a new macro like INSN_BASE_REG_CLASS as other > parameters are actually unused? Then we don't need to change other > targets like avr/gcn. > I thought about this too.  Using new macros would be definitely worth to add, especially when you are already adding INSN_INDEX_REG_CLASS. The names INSN_BASE_REG_CLASS instead of MODE_CODE_BASE_REG_CLASS and REGNO_OK_FOR_INSN_BASE_P instead of REGNO_MODE_CODE_OK_FOR_BASE_P are ok for me too. When you submit the v2 patch, I'll review the RA part as soon as possible (actually I already looked at this) and most probably give my approval for the RA part because I prefer you current approach for RA instead of introducing new memory constraints.