From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26870 invoked by alias); 24 Oct 2014 15:18:02 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 26826 invoked by uid 89); 24 Oct 2014 15:18:01 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.8 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mailapp01.imgtec.com Received: from mailapp01.imgtec.com (HELO mailapp01.imgtec.com) (195.59.15.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 24 Oct 2014 15:18:00 +0000 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id 2264522972A6E; Fri, 24 Oct 2014 16:17:53 +0100 (IST) Received: from KLMAIL02.kl.imgtec.org (10.40.60.222) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Fri, 24 Oct 2014 16:17:55 +0100 Received: from LEMAIL01.le.imgtec.org (192.168.152.62) by klmail02.kl.imgtec.org (10.40.60.222) with Microsoft SMTP Server (TLS) id 14.3.195.1; Fri, 24 Oct 2014 16:17:55 +0100 Received: from LEMAIL01.le.imgtec.org ([fe80::5ae:ee16:f4b9:cda9]) by LEMAIL01.le.imgtec.org ([fe80::5ae:ee16:f4b9:cda9%17]) with mapi id 14.03.0195.001; Fri, 24 Oct 2014 16:17:55 +0100 From: Matthew Fortune To: Alan Lawrence , "gcc-patches@gcc.gnu.org" CC: Richard Biener , David Edelsohn Subject: RE: [PATCH v2 0-6/11] Fix PR/61114, make direct vector reductions endianness-neutral Date: Fri, 24 Oct 2014 15:19:00 -0000 Message-ID: <6D39441BF12EF246A7ABCE6654B0235320F32816@LEMAIL01.le.imgtec.org> References: <544A3E0B.2000803@arm.com> In-Reply-To: <544A3E0B.2000803@arm.com> Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-IsSubscribed: yes X-SW-Source: 2014-10/txt/msg02568.txt.bz2 Alan Lawrence writes: > Patches 7-11 migrate migrate ARM, x86, IA64 (I think), and mostly PowerPC, > to > the new reduc_(plus|[us](min|max))_scal_optab. I have not managed to work > out > how to do the same for MIPS (specifically what I need to add to > mips_expand_vec_reduc), and have had no response from the maintainers, so > am Sorry, I was looking at this but failed to send an email saying so. The lack of vec_extract appears to be the stumbling point here so at the very least we need to add a na=EFve version of that I believe. > (2) also renaming reduc_..._scal_optab back to reduc_..._optab; would > break the > MIPS backend if something were not done with it's existing patterns. I suspect we can deal with this in time to make a rename OK. One thing occurred to me about this change in general which is that on the whole the reduction to a scalar seems good for an epilogue but is there a problem if the result is then replicated across a vector for further processing. I.e. a vector is reduced to a scalar, which moves the value from a SIMD register to a GP register (because scalar modes are not supported in SIMD registers generally) and then gets moved back to a SIMD register to form part of a new vector? Would you expect the redundant moves to get eliminated? Thanks, Matthew