From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 67602 invoked by alias); 17 Jun 2015 21:09:14 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 67586 invoked by uid 89); 17 Jun 2015 21:09:12 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mailapp01.imgtec.com Received: from mailapp01.imgtec.com (HELO mailapp01.imgtec.com) (195.59.15.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 17 Jun 2015 21:09:11 +0000 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id 38DDA2214176C; Wed, 17 Jun 2015 22:09:04 +0100 (IST) Received: from LEMAIL01.le.imgtec.org (192.168.152.62) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Wed, 17 Jun 2015 22:09:08 +0100 Received: from LEMAIL01.le.imgtec.org ([fe80::5ae:ee16:f4b9:cda9]) by LEMAIL01.le.imgtec.org ([fe80::5ae:ee16:f4b9:cda9%17]) with mapi id 14.03.0210.002; Wed, 17 Jun 2015 22:09:07 +0100 From: Matthew Fortune To: Steve Ellcey , Richard Sandiford CC: "Maciej W. Rozycki" , Richard Sandiford , Joseph Myers , "gcc-patches@gcc.gnu.org" , Catherine Moore Subject: RE: [Patch, MIPS] Enable fp-contract on MIPS and update -mfused-madd Date: Wed, 17 Jun 2015 22:06:00 -0000 Message-ID: <6D39441BF12EF246A7ABCE6654B023532116C02D@LEMAIL01.le.imgtec.org> References: <4c25620c-546c-40ae-b330-3652fe25f791@BAMAIL02.ba.imgtec.org> <87mvzy4nwu.fsf@e105548-lin.cambridge.arm.com> <1434562571.18552.6.camel@ubuntu-sellcey> <87381qw4wz.fsf@googlemail.com> <1434574154.18552.15.camel@ubuntu-sellcey> In-Reply-To: <1434574154.18552.15.camel@ubuntu-sellcey> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-IsSubscribed: yes X-SW-Source: 2015-06/txt/msg01230.txt.bz2 Steve Ellcey writes: > On Wed, 2015-06-17 at 19:44 +0100, Richard Sandiford wrote: >=20 > > > > FWIW, to be specific, I think we're talking about every check except > > the last two in mips.md: > > > > and the one mips-ps-3d.md: > > > > In particular, the two checks in mips.c should go. >=20 > OK, here is a patch that does that. >=20 > > But like I say, please do add a comment above the unfused patterns to s= ay > > why we can match NEG here without the HONOR_NANS test. It's going to be > > far from obvious to anyone who hasn't read this thread. >=20 > I put these comments in mips.md as part of the patch: >=20 > ;; The various multiply accumulate instructions can be used even when > ;; HONOR_NANS is true because while IEEE 754-2008 requires the negate > ;; operation to negate the sign of a NAN and the MIPS neg instruction does > ;; not do this, the multiply and add (or minus) parts of these instructio= ns > ;; have no requirement on how the sign of a NAN is handled and so the fin= al > ;; sign bit of the entire operation is undefined. >=20 > > It's also worth pointing out (although it's probably obvious) that this= is > > effectively going to be a no-op change. We'd never have a NEG to combi= ne > > if we were honouring NANs and using the legacy pre-2008 mode. We should > > still be accurate though. Especially when it's also less code :-) >=20 > Actually, this wasn't obvious to me. I thought this must have some > affect but I ran through the various options and architectures and, sure > enough, I found no differences in the generated code. >=20 > Here is my "prequel" patch. How does this look? >=20 > Steve Ellcey > sellcey@imgtec.com >=20 > 2015-06-17 Steve Ellcey >=20 > * config/mips/mips.c (mips_rtx_costs): Remove HONOR_NAN check. > * config/mips/mips.md (*madd4): Ditto. > (*nmadd3) Ditto. > (*nmadd4_fastmath): Ditto. > (*nmadd3_fastmath): Ditto. > (*nmsub4): Ditto. > (*nmsub3): Ditto. > (*nmsub4_fastmath): Ditto. > (*nmsub3_fastmath): Ditto. I'd like to delegate to Maciej to approve this and the actual fp-contract patch. I have nothing of value to add to this discussion but to say it is clearly comprehensive. Thanks, Matthew > diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c > index d427c0c..1c837cf 100644 > --- a/gcc/config/mips/mips.c > +++ b/gcc/config/mips/mips.c > @@ -4069,7 +4069,6 @@ mips_rtx_costs (rtx x, int code, int outer_code, in= t opno > ATTRIBUTE_UNUSED, > if (float_mode_p > && (ISA_HAS_NMADD4_NMSUB4 || ISA_HAS_NMADD3_NMSUB3) > && TARGET_FUSED_MADD > - && !HONOR_NANS (mode) > && !HONOR_SIGNED_ZEROS (mode)) > { > /* See if we can use NMADD or NMSUB. See mips.md for the > @@ -4137,7 +4136,6 @@ mips_rtx_costs (rtx x, int code, int outer_code, in= t opno > ATTRIBUTE_UNUSED, > if (float_mode_p > && (ISA_HAS_NMADD4_NMSUB4 || ISA_HAS_NMADD3_NMSUB3) > && TARGET_FUSED_MADD > - && !HONOR_NANS (mode) > && HONOR_SIGNED_ZEROS (mode)) > { > /* See if we can use NMADD or NMSUB. See mips.md for the > diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md > index 0a23fa2..f6912e1 100644 > --- a/gcc/config/mips/mips.md > +++ b/gcc/config/mips/mips.md > @@ -2475,6 +2475,13 @@ >=20 > ;; Floating point multiply accumulate instructions. >=20 > +;; The various multiply accumulate instructions can be used even when > +;; HONOR_NANS is true because while IEEE 754-2008 requires the negate > +;; operation to negate the sign of a NAN and the MIPS neg instruction do= es > +;; not do this, the multiply and add (or minus) parts of these instructi= ons > +;; have no requirement on how the sign of a NAN is handled and so the fi= nal > +;; sign bit of the entire operation is undefined. > + > (define_insn "*madd4" > [(set (match_operand:ANYF 0 "register_operand" "=3Df") > (plus:ANYF (mult:ANYF (match_operand:ANYF 1 "register_operand" "f") > @@ -2533,8 +2540,7 @@ > (match_operand:ANYF 3 "register_operand" "f"))))] > "ISA_HAS_NMADD4_NMSUB4 > && TARGET_FUSED_MADD > - && HONOR_SIGNED_ZEROS (mode) > - && !HONOR_NANS (mode)" > + && HONOR_SIGNED_ZEROS (mode)" > "nmadd.\t%0,%3,%1,%2" > [(set_attr "type" "fmadd") > (set_attr "mode" "")]) > @@ -2547,8 +2553,7 @@ > (match_operand:ANYF 3 "register_operand" "0"))))] > "ISA_HAS_NMADD3_NMSUB3 > && TARGET_FUSED_MADD > - && HONOR_SIGNED_ZEROS (mode) > - && !HONOR_NANS (mode)" > + && HONOR_SIGNED_ZEROS (mode)" > "nmadd.\t%0,%1,%2" > [(set_attr "type" "fmadd") > (set_attr "mode" "")]) > @@ -2561,8 +2566,7 @@ > (match_operand:ANYF 3 "register_operand" "f")))] > "ISA_HAS_NMADD4_NMSUB4 > && TARGET_FUSED_MADD > - && !HONOR_SIGNED_ZEROS (mode) > - && !HONOR_NANS (mode)" > + && !HONOR_SIGNED_ZEROS (mode)" > "nmadd.\t%0,%3,%1,%2" > [(set_attr "type" "fmadd") > (set_attr "mode" "")]) > @@ -2575,8 +2579,7 @@ > (match_operand:ANYF 3 "register_operand" "0")))] > "ISA_HAS_NMADD3_NMSUB3 > && TARGET_FUSED_MADD > - && !HONOR_SIGNED_ZEROS (mode) > - && !HONOR_NANS (mode)" > + && !HONOR_SIGNED_ZEROS (mode)" > "nmadd.\t%0,%1,%2" > [(set_attr "type" "fmadd") > (set_attr "mode" "")]) > @@ -2589,8 +2592,7 @@ > (match_operand:ANYF 1 "register_operand" "f"))))] > "ISA_HAS_NMADD4_NMSUB4 > && TARGET_FUSED_MADD > - && HONOR_SIGNED_ZEROS (mode) > - && !HONOR_NANS (mode)" > + && HONOR_SIGNED_ZEROS (mode)" > "nmsub.\t%0,%1,%2,%3" > [(set_attr "type" "fmadd") > (set_attr "mode" "")]) > @@ -2603,8 +2605,7 @@ > (match_operand:ANYF 1 "register_operand" "0"))))] > "ISA_HAS_NMADD3_NMSUB3 > && TARGET_FUSED_MADD > - && HONOR_SIGNED_ZEROS (mode) > - && !HONOR_NANS (mode)" > + && HONOR_SIGNED_ZEROS (mode)" > "nmsub.\t%0,%1,%2" > [(set_attr "type" "fmadd") > (set_attr "mode" "")]) > @@ -2617,8 +2618,7 @@ > (match_operand:ANYF 3 "register_operand" "f"))))] > "ISA_HAS_NMADD4_NMSUB4 > && TARGET_FUSED_MADD > - && !HONOR_SIGNED_ZEROS (mode) > - && !HONOR_NANS (mode)" > + && !HONOR_SIGNED_ZEROS (mode)" > "nmsub.\t%0,%1,%2,%3" > [(set_attr "type" "fmadd") > (set_attr "mode" "")]) > @@ -2631,8 +2631,7 @@ > (match_operand:ANYF 3 "register_operand" "0"))))] > "ISA_HAS_NMADD3_NMSUB3 > && TARGET_FUSED_MADD > - && !HONOR_SIGNED_ZEROS (mode) > - && !HONOR_NANS (mode)" > + && !HONOR_SIGNED_ZEROS (mode)" > "nmsub.\t%0,%1,%2" > [(set_attr "type" "fmadd") > (set_attr "mode" "")]) >=20 >=20