From: Xi Ruoyao <xry111@xry111.site>
To: gcc-patches@gcc.gnu.org
Cc: Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
Subject: PING^4: [PATCH] rtl-optimization/110939 Really fix narrow comparison of memory and constant
Date: Mon, 11 Sep 2023 00:56:16 +0800 [thread overview]
Message-ID: <6b775391962e6fd035da3815db32a0465511b08a.camel@xry111.site> (raw)
In-Reply-To: <ZPVxNv5lHA3wnqPc@li-819a89cc-2401-11b2-a85c-cca1ce6aa768.ibm.com>
Ping.
> > > On Thu, Aug 10, 2023 at 03:04:03PM +0200, Stefan Schulze Frielinghaus wrote:
> > > > In the former fix in commit 41ef5a34161356817807be3a2e51fbdbe575ae85 I
> > > > completely missed the fact that the normal form of a generated constant for a
> > > > mode with fewer bits than in HOST_WIDE_INT is a sign extended version of the
> > > > actual constant. This even holds true for unsigned constants.
> > > >
> > > > Fixed by masking out the upper bits for the incoming constant and sign
> > > > extending the resulting unsigned constant.
> > > >
> > > > Bootstrapped and regtested on x64 and s390x. Ok for mainline?
> > > >
> > > > While reading existing optimizations in combine I stumbled across two
> > > > optimizations where either my intuition about the representation of
> > > > unsigned integers via a const_int rtx is wrong, which then in turn would
> > > > probably also mean that this patch is wrong, or that the optimizations
> > > > are missed sometimes. In other words in the following I would assume
> > > > that the upper bits are masked out:
> > > >
> > > > diff --git a/gcc/combine.cc b/gcc/combine.cc
> > > > index 468b7fde911..80c4ff0fbaf 100644
> > > > --- a/gcc/combine.cc
> > > > +++ b/gcc/combine.cc
> > > > @@ -11923,7 +11923,7 @@ simplify_compare_const (enum rtx_code code, machine_mode mode,
> > > > /* (unsigned) < 0x80000000 is equivalent to >= 0. */
> > > > else if (is_a <scalar_int_mode> (mode, &int_mode)
> > > > && GET_MODE_PRECISION (int_mode) - 1 < HOST_BITS_PER_WIDE_INT
> > > > - && ((unsigned HOST_WIDE_INT) const_op
> > > > + && (((unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode))
> > > > == HOST_WIDE_INT_1U << (GET_MODE_PRECISION (int_mode) - 1)))
> > > > {
> > > > const_op = 0;
> > > > @@ -11962,7 +11962,7 @@ simplify_compare_const (enum rtx_code code, machine_mode mode,
> > > > /* (unsigned) >= 0x80000000 is equivalent to < 0. */
> > > > else if (is_a <scalar_int_mode> (mode, &int_mode)
> > > > && GET_MODE_PRECISION (int_mode) - 1 < HOST_BITS_PER_WIDE_INT
> > > > - && ((unsigned HOST_WIDE_INT) const_op
> > > > + && (((unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode))
> > > > == HOST_WIDE_INT_1U << (GET_MODE_PRECISION (int_mode) - 1)))
> > > > {
> > > > const_op = 0;
> > > >
> > > > For example, while bootstrapping on x64 the optimization is missed since
> > > > a LTU comparison in QImode is done and the constant equals
> > > > 0xffffffffffffff80.
> > > >
> > > > Sorry for inlining another patch, but I would really like to make sure
> > > > that my understanding is correct, now, before I come up with another
> > > > patch. Thus it would be great if someone could shed some light on this.
> > > >
> > > > gcc/ChangeLog:
> > > >
> > > > * combine.cc (simplify_compare_const): Properly handle unsigned
> > > > constants while narrowing comparison of memory and constants.
> > > > ---
> > > > gcc/combine.cc | 19 ++++++++++---------
> > > > 1 file changed, 10 insertions(+), 9 deletions(-)
> > > >
> > > > diff --git a/gcc/combine.cc b/gcc/combine.cc
> > > > index e46d202d0a7..468b7fde911 100644
> > > > --- a/gcc/combine.cc
> > > > +++ b/gcc/combine.cc
> > > > @@ -12003,14 +12003,15 @@ simplify_compare_const (enum rtx_code code, machine_mode mode,
> > > > && !MEM_VOLATILE_P (op0)
> > > > /* The optimization makes only sense for constants which are big enough
> > > > so that we have a chance to chop off something at all. */
> > > > - && (unsigned HOST_WIDE_INT) const_op > 0xff
> > > > - /* Bail out, if the constant does not fit into INT_MODE. */
> > > > - && (unsigned HOST_WIDE_INT) const_op
> > > > - < ((HOST_WIDE_INT_1U << (GET_MODE_PRECISION (int_mode) - 1) << 1) - 1)
> > > > + && ((unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode)) > 0xff
> > > > /* Ensure that we do not overflow during normalization. */
> > > > - && (code != GTU || (unsigned HOST_WIDE_INT) const_op < HOST_WIDE_INT_M1U))
> > > > + && (code != GTU
> > > > + || ((unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode))
> > > > + < HOST_WIDE_INT_M1U)
> > > > + && trunc_int_for_mode (const_op, int_mode) == const_op)
> > > > {
> > > > - unsigned HOST_WIDE_INT n = (unsigned HOST_WIDE_INT) const_op;
> > > > + unsigned HOST_WIDE_INT n
> > > > + = (unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode);
> > > > enum rtx_code adjusted_code;
> > > >
> > > > /* Normalize code to either LEU or GEU. */
> > > > @@ -12051,15 +12052,15 @@ simplify_compare_const (enum rtx_code code, machine_mode mode,
> > > > HOST_WIDE_INT_PRINT_HEX ") to (MEM %s "
> > > > HOST_WIDE_INT_PRINT_HEX ").\n", GET_MODE_NAME (int_mode),
> > > > GET_MODE_NAME (narrow_mode_iter), GET_RTX_NAME (code),
> > > > - (unsigned HOST_WIDE_INT)const_op, GET_RTX_NAME (adjusted_code),
> > > > - n);
> > > > + (unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode),
> > > > + GET_RTX_NAME (adjusted_code), n);
> > > > }
> > > > poly_int64 offset = (BYTES_BIG_ENDIAN
> > > > ? 0
> > > > : (GET_MODE_SIZE (int_mode)
> > > > - GET_MODE_SIZE (narrow_mode_iter)));
> > > > *pop0 = adjust_address_nv (op0, narrow_mode_iter, offset);
> > > > - *pop1 = GEN_INT (n);
> > > > + *pop1 = gen_int_mode (n, narrow_mode_iter);
> > > > return adjusted_code;
> > > > }
> > > > }
> > > > --
> > > > 2.41.0
> > > >
> >
> > --
> > Xi Ruoyao <xry111@xry111.site>
> > School of Aerospace Science and Technology, Xidian University
--
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University
next prev parent reply other threads:[~2023-09-10 16:56 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-10 13:04 Stefan Schulze Frielinghaus
2023-08-12 1:04 ` Xi Ruoyao
2023-08-14 6:39 ` Stefan Schulze Frielinghaus
2023-08-18 11:04 ` Stefan Schulze Frielinghaus
2023-08-24 3:31 ` PING^2: " Xi Ruoyao
2023-09-04 5:55 ` PING^3: " Stefan Schulze Frielinghaus
2023-09-10 16:56 ` Xi Ruoyao [this message]
2023-09-19 7:31 ` PING^5: " Xi Ruoyao
2023-09-19 16:06 ` Stefan Schulze Frielinghaus
2023-09-25 10:52 ` Eric Botcazou
2023-09-29 18:51 ` Jeff Law
2023-08-29 10:24 ` Xi Ruoyao
2023-09-29 19:01 ` Jeff Law
2023-10-01 14:26 ` Stefan Schulze Frielinghaus
2023-10-01 14:36 ` Jeff Law
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=6b775391962e6fd035da3815db32a0465511b08a.camel@xry111.site \
--to=xry111@xry111.site \
--cc=gcc-patches@gcc.gnu.org \
--cc=stefansf@linux.ibm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).