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Mon, 26 Feb 2024 10:46:15 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8598E20043; Mon, 26 Feb 2024 10:46:13 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6338E20078; Mon, 26 Feb 2024 10:46:11 +0000 (GMT) Received: from [9.197.224.85] (unknown [9.197.224.85]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 26 Feb 2024 10:46:11 +0000 (GMT) Message-ID: <6f19a051-5474-8a42-cdf1-a32cb8e74927@linux.ibm.com> Date: Mon, 26 Feb 2024 18:46:09 +0800 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: Repost [PATCH 1/6] Add -mcpu=future Content-Language: en-US To: Michael Meissner References: <4a7b481d-8967-7f90-ad30-7df955552db8@linux.ibm.com> From: "Kewen.Lin" Cc: gcc-patches@gcc.gnu.org, Peter Bergner , Segher Boessenkool , David Edelsohn In-Reply-To: Content-Type: text/plain; charset=UTF-8 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: a0TeJqyB0KxmFU9p3TYAehb_RmyU-I75 X-Proofpoint-GUID: c_Z9tHoN_BiT6B-ojV-ZOyzmervBkCKh Content-Transfer-Encoding: 7bit X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-26_07,2024-02-26_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 priorityscore=1501 mlxscore=0 adultscore=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 spamscore=0 mlxlogscore=999 phishscore=0 impostorscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402260081 X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,KAM_SHORT,NICE_REPLY_A,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: on 2024/2/21 15:19, Michael Meissner wrote: > On Tue, Feb 20, 2024 at 06:35:34PM +0800, Kewen.Lin wrote: >> Hi Mike, >> >> Sorry for late reply (just back from vacation). >> >> on 2024/2/8 03:58, Michael Meissner wrote: >>> On Wed, Feb 07, 2024 at 05:21:10PM +0800, Kewen.Lin wrote: >>>> on 2024/2/6 14:01, Michael Meissner wrote: >>>> Sorry for the possible confusion here, the "tune_proc" that I referred to is >>>> the variable in the above else branch: >>>> >>>> enum processor_type tune_proc = (TARGET_POWERPC64 ? PROCESSOR_DEFAULT64 : PROCESSOR_DEFAULT); >>>> >>>> It's either PROCESSOR_DEFAULT64 or PROCESSOR_DEFAULT, so it doesn't have a >>>> chance to be PROCESSOR_FUTURE, so the checking "tune_proc == PROCESSOR_FUTURE" >>>> is useless. >>> >>> PROCESSOR_DEFAULT can be PROCESSOR_FUTURE if somebody configures GCC with >>> --with-cpu=future. While in general it shouldn't occur, it is helpful to >>> consider all of the corner cases. >> >> But it sounds not true, I think you meant TARGET_CPU_DEFAULT instead? >> >> On one local ppc64le machine I tried to configure with --with-cpu=power10, >> I got {,OPTION_}TARGET_CPU_DEFAULT "power10" but PROCESSOR_DEFAULT is still >> PROCESSOR_POWER7 (PROCESSOR_DEFAULT64 is PROCESSOR_POWER8). I think these >> PROCESSOR_DEFAULT{,64} are defined by various headers: > > Yes, I was mistaken. You are correct TARGET_CPU_DEFAULT is set. I will change > the comments. Thanks! > >> gcc/config/rs6000/aix71.h:#define PROCESSOR_DEFAULT PROCESSOR_POWER7 >> gcc/config/rs6000/aix71.h:#define PROCESSOR_DEFAULT64 PROCESSOR_POWER7 >> gcc/config/rs6000/aix72.h:#define PROCESSOR_DEFAULT PROCESSOR_POWER7 >> gcc/config/rs6000/aix72.h:#define PROCESSOR_DEFAULT64 PROCESSOR_POWER7 >> gcc/config/rs6000/aix73.h:#define PROCESSOR_DEFAULT PROCESSOR_POWER8 >> gcc/config/rs6000/aix73.h:#define PROCESSOR_DEFAULT64 PROCESSOR_POWER8 >> gcc/config/rs6000/darwin.h:#define PROCESSOR_DEFAULT PROCESSOR_PPC7400 >> gcc/config/rs6000/darwin.h:#define PROCESSOR_DEFAULT64 PROCESSOR_POWER4 >> gcc/config/rs6000/freebsd64.h:#define PROCESSOR_DEFAULT PROCESSOR_PPC7450 >> gcc/config/rs6000/freebsd64.h:#define PROCESSOR_DEFAULT64 PROCESSOR_POWER8 >> gcc/config/rs6000/linux64.h:#define PROCESSOR_DEFAULT PROCESSOR_POWER7 >> gcc/config/rs6000/linux64.h:#define PROCESSOR_DEFAULT64 PROCESSOR_POWER8 >> gcc/config/rs6000/rs6000.h:#define PROCESSOR_DEFAULT PROCESSOR_PPC603 >> gcc/config/rs6000/rs6000.h:#define PROCESSOR_DEFAULT64 PROCESSOR_RS64A >> gcc/config/rs6000/vxworks.h:#define PROCESSOR_DEFAULT PROCESSOR_PPC604 >> >> , and they are unlikely to be updated later, no? >> >> btw, the given --with-cpu=future will make cpu_index never negative so >> >> ... >> else if (cpu_index >= 0) >> rs6000_tune_index = tune_index = cpu_index; >> else >> ... >> >> so there is no chance to enter "else" arm, that is, that arm only takes >> effect when no cpu/tune is given (neither -m{cpu,tune} nor --with-cpu=). > > Note, this is existing code. I didn't modify it. If we want to change it, we > should do it as another patch. Yes, I agree. Just to clarify, I didn't suggest changing it but instead suggested almost keeping them, since we don't need any changes in "else" arm, so instead of updating in arms "if" and "else if" for "future cpu type", it seems a bit more clear to just check it after this, ie.: ---- bool explicit_tune = false; if (rs6000_tune_index >= 0) { tune_index = rs6000_tune_index; explicit_tune = true; } else if (cpu_index >= 0) // as before rs6000_tune_index = tune_index = cpu_index; else { //as before ... } // Check tune_index here instead. if (processor_target_table[tune_index].processor == PROCESSOR_FUTURE) { tune_index = rs6000_cpu_index_lookup (PROCESSOR_POWER10); if (explicit_tune) warn ... } // as before rs6000_tune = processor_target_table[tune_index].processor; ---- , copied from previous comment: https://gcc.gnu.org/pipermail/gcc-patches/2024-January/643681.html BR, Kewen