* [PATCH] pdp11: fix wrong code
@ 2010-11-09 1:15 Paul Koning
0 siblings, 0 replies; 4+ messages in thread
From: Paul Koning @ 2010-11-09 1:15 UTC (permalink / raw)
To: gcc-patches
This patch fixes wrong assembly output for negsi2 (incorrect carry propagation from low to high half).
Tested by build and inspection of output. Committed.
paul
ChangeLog:
2010-11-08 Paul Koning <ni1d@arrl.net>
* config/pdp11/pdp11.md (negsi2): Fix wrong code.
Index: config/pdp11/pdp11.md
===================================================================
--- config/pdp11/pdp11.md (revision 166433)
+++ config/pdp11/pdp11.md (working copy)
@@ -1091,9 +1091,8 @@
lateoperands[1] = operands[1];
operands[1] = gen_rtx_REG (HImode, REGNO (operands[1]) + 1);
- output_asm_insn (\"com %0\", operands);
output_asm_insn (\"com %0\", lateoperands);
- output_asm_insn (\"inc %0\", operands);
+ output_asm_insn (\"neg %0\", operands);
output_asm_insn (\"adc %0\", lateoperands);
return \"\";
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH] pdp11: fix wrong code
@ 2010-11-21 19:12 Paul Koning
0 siblings, 0 replies; 4+ messages in thread
From: Paul Koning @ 2010-11-21 19:12 UTC (permalink / raw)
To: gcc-patches
This patch corrects mishandling the carry between words in negsi.
Tested by build and make check. Committed.
paul
ChangeLog:
2010-11-21 Paul Koning <ni1d@arrl.net>
* config/mips/pdp11.md (negsi2): Fix wrong code.
Index: config/pdp11/pdp11.md
===================================================================
--- config/pdp11/pdp11.md (revision 166978)
+++ config/pdp11/pdp11.md (working copy)
@@ -1149,12 +1149,13 @@
operands[1] = gen_rtx_REG (HImode, REGNO (operands[1]) + 1);
output_asm_insn (\"com %0\", lateoperands);
- output_asm_insn (\"neg %0\", operands);
+ output_asm_insn (\"com %0\", operands);
+ output_asm_insn (\"add $1, %0\", operands);
output_asm_insn (\"adc %0\", lateoperands);
return \"\";
}
- [(set_attr "length" "10")])
+ [(set_attr "length" "14")])
(define_insn "neghi2"
[(set (match_operand:HI 0 "nonimmediate_operand" "=rR,Q")
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] pdp11: fix wrong code
2010-11-09 1:32 Paul Koning
@ 2010-11-09 15:21 ` Paul Koning
0 siblings, 0 replies; 4+ messages in thread
From: Paul Koning @ 2010-11-09 15:21 UTC (permalink / raw)
To: gcc-patches
On Nov 8, 2010, at 8:15 PM, Paul Koning wrote:
> This is another wrong-code fix, in logical right shift. The original code tried to optimize the case for shift by 1, but ended up unconditionally shifting by 1 even if the request was for a different shift.
>
> Tested by build and inspection of the output. Committed.
>
> paul
Here is a correction to that patch, needed because subtract constant should be encoded as an add.
Tested by build, make check. Committed.
paul
ChangeLog:
2010-11-09 Paul Koning <ni1d@arrl.net>
* config/pdp11/pdp11.md (lshrsi3, lshrhi3): Use add for
decrement.
Index: config/pdp11/pdp11.md
===================================================================
--- config/pdp11/pdp11.md (revision 166480)
+++ config/pdp11/pdp11.md (working copy)
@@ -897,7 +897,7 @@
if (GET_CODE (operands[2]) != CONST_INT)
{
r = gen_reg_rtx (HImode);
- emit_insn (gen_subhi3 (r, operands [2], GEN_INT (1)));
+ emit_insn (gen_addhi3 (r, operands [2], GEN_INT (-1)));
emit_insn (gen_ashrsi3 (operands[0], operands[0], r));
}
else if ((unsigned) INTVAL (operands[2]) != 1)
@@ -1043,7 +1043,7 @@
if (GET_CODE (operands[2]) != CONST_INT)
{
r = gen_reg_rtx (HImode);
- emit_insn (gen_subhi3 (r, operands [2], GEN_INT (1)));
+ emit_insn (gen_addhi3 (r, operands [2], GEN_INT (-1)));
emit_insn (gen_ashrhi3 (operands[0], operands[0], r));
}
else if ((unsigned) INTVAL (operands[2]) != 1)
aaa-5v57ooxfyrm:gcc pkoning$ svn update ChangeLog
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH] pdp11: fix wrong code
@ 2010-11-09 1:32 Paul Koning
2010-11-09 15:21 ` Paul Koning
0 siblings, 1 reply; 4+ messages in thread
From: Paul Koning @ 2010-11-09 1:32 UTC (permalink / raw)
To: gcc-patches
This is another wrong-code fix, in logical right shift. The original code tried to optimize the case for shift by 1, but ended up unconditionally shifting by 1 even if the request was for a different shift.
Tested by build and inspection of the output. Committed.
paul
ChangeLog:
2010-11-08 Paul Koning <ni1d@arrl.net>
* config/pdp11/pdp11.md (lshrsi3, lshrhi3): Fix wrong code.
Index: config/pdp11/pdp11.md
===================================================================
--- config/pdp11/pdp11.md (revision 166467)
+++ config/pdp11/pdp11.md (working copy)
@@ -849,7 +849,7 @@
[(set_attr "length" "2,4")])
;; lsr
-(define_insn ""
+(define_insn "lsrhi1"
[(set (match_operand:HI 0 "nonimmediate_operand" "=rR,Q")
(lshiftrt:HI (match_operand:HI 1 "general_operand" "0,0")
(const_int 1)))]
@@ -857,7 +857,7 @@
"clc\;ror %0"
[(set_attr "length" "2,4")])
-(define_insn "lshrsi3"
+(define_insn "lsrsi1"
[(set (match_operand:SI 0 "register_operand" "=r")
(lshiftrt:SI (match_operand:SI 1 "general_operand" "0")
(const_int 1)))]
@@ -880,6 +880,36 @@
}
[(set_attr "length" "10")])
+(define_expand "lshrsi3"
+ [(match_operand:SI 0 "register_operand" "")
+ (match_operand:SI 1 "register_operand" "0")
+ (match_operand:HI 2 "general_operand" "")]
+ ""
+ "
+{
+ rtx r;
+
+ if (!TARGET_40_PLUS &&
+ (GET_CODE (operands[2]) != CONST_INT ||
+ (unsigned) INTVAL (operands[2]) > 3))
+ FAIL;
+ emit_insn (gen_lsrsi1 (operands[0], operands[1]));
+ if (GET_CODE (operands[2]) != CONST_INT)
+ {
+ r = gen_reg_rtx (HImode);
+ emit_insn (gen_subhi3 (r, operands [2], GEN_INT (1)));
+ emit_insn (gen_ashrsi3 (operands[0], operands[0], r));
+ }
+ else if ((unsigned) INTVAL (operands[2]) != 1)
+ {
+ emit_insn (gen_ashlsi3 (operands[0], operands[0],
+ GEN_INT (1 - INTVAL (operands[2]))));
+ }
+ DONE;
+}
+"
+)
+
;; shift is by arbitrary count is expensive,
;; shift by one cheap - so let's do that, if
;; space doesn't matter
@@ -996,14 +1026,36 @@
operands[2] = negate_rtx (HImode, operands[2]);
}")
-;;;;- logical shift instructions
-;;(define_insn "lshrsi3"
-;; [(set (match_operand:HI 0 "register_operand" "=r")
-;; (lshiftrt:HI (match_operand:HI 1 "register_operand" "0")
-;; (match_operand:HI 2 "general_operand" "rI")))]
-;; ""
-;; "srl %0,%2")
+(define_expand "lshrhi3"
+ [(match_operand:HI 0 "register_operand" "")
+ (match_operand:HI 1 "register_operand" "")
+ (match_operand:HI 2 "general_operand" "")]
+ ""
+ "
+{
+ rtx r;
+ if (!TARGET_40_PLUS &&
+ (GET_CODE (operands[2]) != CONST_INT ||
+ (unsigned) INTVAL (operands[2]) > 3))
+ FAIL;
+ emit_insn (gen_lsrhi1 (operands[0], operands[1]));
+ if (GET_CODE (operands[2]) != CONST_INT)
+ {
+ r = gen_reg_rtx (HImode);
+ emit_insn (gen_subhi3 (r, operands [2], GEN_INT (1)));
+ emit_insn (gen_ashrhi3 (operands[0], operands[0], r));
+ }
+ else if ((unsigned) INTVAL (operands[2]) != 1)
+ {
+ emit_insn (gen_ashlhi3 (operands[0], operands[0],
+ GEN_INT (1 - INTVAL (operands[2]))));
+ }
+ DONE;
+}
+"
+)
+
;; absolute
(define_insn "absdf2"
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