From: Kyrylo Tkachov <ktkachov@nvidia.com>
To: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: Richard Earnshaw <richard.earnshaw@arm.com>,
Richard Sandiford <richard.sandiford@arm.com>
Subject: [PATCH] aarch64: Remove RNG and MTE from -mcpu=neoverse-v2
Date: Thu, 27 Jun 2024 08:58:15 +0000 [thread overview]
Message-ID: <71AFBBBF-3096-4132-BF24-788260F01A20@nvidia.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 381 bytes --]
Hi all,
According to the TRM for Neoverse V2 the Memory Tagging and RNG features
are optional configurations of the core and may not always be present.
Therefore -mcpu=neoverse-v2 shouldn't enable them, similar to how the crypto extensions aren’t enabled by default.
Bootstrapped and tested on aarch64-none-linux-gnu.
Does this reasoning make sense?
Thanks,
Kyrill
[-- Attachment #2: v2-remove-mte-rng.patch --]
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From 690b500ef2bb5b84eb09ed9841b3e3c033715103 Mon Sep 17 00:00:00 2001
From: Kyrylo Tkachov <ktkachov@nvidia.com>
Date: Sun, 23 Jun 2024 11:01:41 -0700
Subject: [PATCH] [aarch64] Remove RNG and MTE from -mcpu=neoverse-v2
According to the TRM for Neoverse V2 the Memory Tagging and RNG features
are optional configurations of the core and may not always be present.
Therefore -mcpu=neoverse-v2 shouldn't enable them.
Bootstrapped and tested on aarch64-none-linux-gnu
* config/aarch64/aarch64-cores.def (neoverse-v2): Remove MEMTAG and
RNG from features.
(demeter): Likewise.
Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
---
gcc/config/aarch64/aarch64-cores.def | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index e58bc0f27de..0c6150e407f 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -193,10 +193,10 @@ AARCH64_CORE("cortex-x4", cortexx4, cortexa57, V9_2A, (SVE2_BITPERM, MEMTAG, P
AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversen2, 0x41, 0xd49, -1)
AARCH64_CORE("cobalt-100", cobalt100, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversen2, 0x6d, 0xd49, -1)
-AARCH64_CORE("neoverse-v2", neoversev2, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversev2, 0x41, 0xd4f, -1)
+AARCH64_CORE("neoverse-v2", neoversev2, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, PROFILE), neoversev2, 0x41, 0xd4f, -1)
AARCH64_CORE("grace", grace, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, SVE2_AES, SVE2_SHA3, SVE2_SM4, PROFILE), neoversev2, 0x41, 0xd4f, -1)
-AARCH64_CORE("demeter", demeter, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversev2, 0x41, 0xd4f, -1)
+AARCH64_CORE("demeter", demeter, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, PROFILE), neoversev2, 0x41, 0xd4f, -1)
/* Generic Architecture Processors. */
AARCH64_CORE("generic", generic, cortexa53, V8A, (), generic, 0x0, 0x0, -1)
--
2.34.1
next reply other threads:[~2024-06-27 8:58 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-27 8:58 Kyrylo Tkachov [this message]
2024-06-27 14:19 ` Tamar Christina
2024-06-27 14:48 ` Kyrylo Tkachov
2024-06-27 14:58 ` Tamar Christina
2024-06-28 7:41 ` Kyrylo Tkachov
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