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From: Mayshao-oc <Mayshao-oc@zhaoxin.com>
To: "Martin Liška" <mliska@suse.cz>, "Uros Bizjak" <ubizjak@gmail.com>
Cc: "Silvia Zhao(BJ-RD)" <SilviaZhao@zhaoxin.com>,
	TimHu-oc <TimHu-oc@zhaoxin.com>,
	"Cobe Chen(BJ-RD)" <CobeChen@zhaoxin.com>,
	"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
	"Hawk Wang(BJ-RD)" <HawkWang@zhaoxin.com>,
	"Louis Qi(BJ-RD)" <LouisQi@zhaoxin.com>,
	Jan Hubicka <hubicka@ucw.cz>
Subject: Re: [PATCH] [x86_64] Zhaoxin lujiazui enablement
Date: Thu, 27 Oct 2022 09:09:00 +0000	[thread overview]
Message-ID: <71e45f1a072a400c8d6a92ead303bab4@zhaoxin.com> (raw)
In-Reply-To: <76a79f24-dcff-a692-f782-956305090ba5@suse.cz>

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>>
>> Hi Martin:
>>     Thanks for your patch,  I comment the questions below.

>Hi.

>:)

>>
>>> Hello.
>>
>>> I noticed this patch set which is kind of related to https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107364.
>>
>>> And I have a couple of questions:
>>
>>>1) I noticed you drop AVX and F16C features for the newly added "lujiazui". Why do you need it?
>>>  I would expect these features would be properly detected by cpuid?
>>
>> Yes, these features could be detected by cpuid, and in respect of functionality, these features are ok, but in respect of performance, these features need further improvement, so we decide to drop it now, and add these features back when performance meet our expectation.

> I see. So theoretically you can increase costs of the corresponding insns and that could be dropped now?
> But I'm not a costing expert.

I am new to gcc, and have lots of things to learn. About LTO and PGO, I have read some knowledge you and hubicka shared, and it helps me a lot, As a performance issue, it is a good idea to use cost model to solve, and disable avx entirely seems overkill. But cost model need to set the appropriate value of the cost, it's challenging to specify the number and more challenging to justify why we set that number. Our current approach have a pitfall to accommodate AVX intrinsic functions(eg: __mm256_loadu_pd), we could use -mavx to specify this explictly to overcome this.

>>
>>> 2) If you really need it, can you please test for me the attached patch? It should come up
>>>  with a new function.
>>
>> I have tested the patch, It's ok.

> Good, I'm going to install it.

>>
>>> 3) Have question about:
>>
>>> else if (vendor == signature_CENTAUR_ebx && family < 0x07)
>>>    cpu_model->__cpu_vendor = VENDOR_CENTAUR;
>>> else if (vendor == signature_SHANGHAI_ebx
>>>               || vendor == signature_CENTAUR_ebx)
>>
>>> Are there any signature_CENTAUR_ebx models with family == 0x7 ?
>>> Similarly, are there any signature_SHANGHAI_ebx modes with family < 0x7 ?
>>
>> Yes, both cases exist in our products.

> Good. Then we miss a CPU features detection for (vendor == signature_CENTAUR_ebx && family < 0x07)
> aka https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107364. But it's not worth it as it's a legacy hardware,
> right?

Yes, for legacy hardware, we need to keep it work correctly, but in respect of performance, we don't spend a lot of time to tune.

> Cheers,
> Martin

>>
>>> Thanks,
>> Martin
>>
>> BR
>> Mayshao


  reply	other threads:[~2022-10-27  9:09 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-25  2:08 MayShao
2022-03-27  9:15 ` Uros Bizjak
2022-03-28  7:25   ` Mayshao-oc
2022-10-25  4:38     ` Martin Liška
2022-10-26  9:06       ` Mayshao-oc
2022-10-26 10:46         ` Martin Liška
2022-10-27  9:09           ` Mayshao-oc [this message]
2022-10-27  9:11             ` Martin Liška
2022-05-17  3:15 [PATCH] [x86_64]: " mayshao
2022-05-17  6:23 ` Richard Biener
2022-05-17  9:33   ` Mayshao-oc
2022-05-22 16:41     ` Uros Bizjak
2022-05-23 10:44       ` Mayshao-oc

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