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Wed, 16 Aug 2023 06:58:19 GMT Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CCE5D20040; Wed, 16 Aug 2023 06:58:18 +0000 (GMT) Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 502D42004D; Wed, 16 Aug 2023 06:58:17 +0000 (GMT) Received: from [9.200.102.40] (unknown [9.200.102.40]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 16 Aug 2023 06:58:17 +0000 (GMT) Message-ID: <7246d52e-8d9d-3585-a363-62237279cb29@linux.ibm.com> Date: Wed, 16 Aug 2023 14:58:15 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.14.0 Subject: Re: [PATCH, rs6000] Skip redundant vector extract if the element is first element of dword0 [PR110429] Content-Language: en-US To: "Kewen.Lin" Cc: Segher Boessenkool , David , Peter Bergner , gcc-patches References: <3222166e-8d56-246e-519a-08807917c6d8@linux.ibm.com> <98881646-a995-23ad-995e-f481a586f426@linux.ibm.com> From: HAO CHEN GUI In-Reply-To: <98881646-a995-23ad-995e-f481a586f426@linux.ibm.com> Content-Type: text/plain; charset=UTF-8 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: wt7hZXcpkaA9PyuSRkn-pWN5fiLo_02h X-Proofpoint-ORIG-GUID: K6Lru54S0HHLofovVy_Fbgl0tZRy-DE1 Content-Transfer-Encoding: 8bit X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-08-16_04,2023-08-15_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=999 bulkscore=0 spamscore=0 clxscore=1015 impostorscore=0 phishscore=0 mlxscore=0 adultscore=0 suspectscore=0 lowpriorityscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2308160060 X-Spam-Status: No, score=-14.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,NICE_REPLY_A,RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Committed after tweaking and testing. https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=d471bdb0453de7b738f49148b66d57cb5871937d Thanks Gui Haochen 在 2023/7/28 17:32, Kewen.Lin 写道: > Hi Haochen, > > on 2023/7/5 11:22, HAO CHEN GUI wrote: >> Hi, >> This patch skips redundant vector extract insn to be generated when >> the extracted element is the first element of dword0 and the destination > > "The first element" is confusing, it's easy to be misunderstood as element > 0, but in fact the extracted element index is: > - for byte, 7 on BE while 8 on LE; > - for half word, 3 on BE while 4 on LE; > > so maybe just say when the extracted index for byte and half word like above, > the element to be stored is already in the corresponding place for stxsi[hb]x, > we don't need a redundant vector extraction at all. > >> is a memory operand. Only one 'stxsi[hb]x' instruction is enough. >> >> The V4SImode is fixed in a previous patch. >> https://gcc.gnu.org/pipermail/gcc-patches/2023-June/622101.html >> >> Bootstrapped and tested on powerpc64-linux BE and LE with no regressions. >> Thanks >> Gui Haochen >> >> ChangeLog >> rs6000: Skip redundant vector extract if the element is first element of >> dword0 >> >> gcc/ >> PR target/110429 >> * config/rs6000/vsx.md (*vsx_extract__store_p9): Skip vector >> extract when the element is the first element of dword0. >> >> gcc/testsuite/ >> PR target/110429 >> * gcc.target/powerpc/pr110429.c: New. >> >> >> patch.diff >> diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md >> index 0c269e4e8d9..b3fec910eb6 100644 >> --- a/gcc/config/rs6000/vsx.md >> +++ b/gcc/config/rs6000/vsx.md >> @@ -3855,7 +3855,22 @@ (define_insn_and_split "*vsx_extract__store_p9" >> (parallel [(match_dup 2)]))) >> (clobber (match_dup 4))]) >> (set (match_dup 0) >> - (match_dup 3))]) >> + (match_dup 3))] >> +{ >> + enum machine_mode dest_mode = GET_MODE (operands[0]); > > Nit: Move this line ... > >> + >> + if (which_alternative == 0 >> + && ((mode == V16QImode >> + && INTVAL (operands[2]) == (BYTES_BIG_ENDIAN ? 7 : 8)) >> + || (mode == V8HImode >> + && INTVAL (operands[2]) == (BYTES_BIG_ENDIAN ? 3 : 4)))) >> + { > > ... here. > >> + emit_move_insn (operands[0], >> + gen_rtx_REG (dest_mode, REGNO (operands[3]))); >> + DONE; >> + } >> +}) >> + >> >> (define_insn_and_split "*vsx_extract_si" >> [(set (match_operand:SI 0 "nonimmediate_operand" "=r,wa,Z") >> diff --git a/gcc/testsuite/gcc.target/powerpc/pr110429.c b/gcc/testsuite/gcc.target/powerpc/pr110429.c >> new file mode 100644 >> index 00000000000..5a938f9f90a >> --- /dev/null >> +++ b/gcc/testsuite/gcc.target/powerpc/pr110429.c >> @@ -0,0 +1,28 @@ >> +/* { dg-do compile } */ >> +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ >> +/* { dg-require-effective-target powerpc_p9vector_ok } */ >> +/* { dg-options "-mdejagnu-cpu=power9 -O2" } */ >> +/* { dg-require-effective-target has_arch_ppc64 } */ >> + >> +#include >> + >> +#ifdef __BIG_ENDIAN__ >> +#define DWORD0_FIRST_SHORT 3 >> +#define DWORD0_FIRST_CHAR 7 >> +#else >> +#define DWORD0_FIRST_SHORT 4 >> +#define DWORD0_FIRST_CHAR 8 >> +#endif >> + >> +void vec_extract_short (vector short v, short* p) >> +{ >> + *p = vec_extract(v, DWORD0_FIRST_SHORT); >> +} >> + >> +void vec_extract_char (vector char v, char* p) >> +{ >> + *p = vec_extract(v, DWORD0_FIRST_CHAR); >> +} >> + >> +/* { dg-final { scan-assembler-times "stxsi\[hb\]x" 2 } } */ > > Nit: Break this check into stxsihx and stxsibx, and surround > with \m and \M. > >> +/* { dg-final { scan-assembler-not "vextractu\[hb\]" } } */ > > Also with \m and \M. > > OK for trunk with these nits tweaked and testing goes well, > thanks! > > BR, > Kewen