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Subject: Re: [PATCH 1/2] LoongArch: Add the macro implementation of
 mcmodel=extreme.
From: Xi Ruoyao <xry111@xry111.site>
To: Lulu Cheng <chenglulu@loongson.cn>, gcc-patches@gcc.gnu.org
Cc: i@xen0n.name, xuchenghua@loongson.cn
Date: Thu, 04 Jan 2024 11:51:41 +0800
In-Reply-To: <20231227084654.20614-2-chenglulu@loongson.cn>
References: <20231227084654.20614-1-chenglulu@loongson.cn>
	 <20231227084654.20614-2-chenglulu@loongson.cn>
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On Wed, 2023-12-27 at 16:46 +0800, Lulu Cheng wrote:
> +(define_insn "movdi_pcrel64"
> + [(set (match_operand:DI 0 "register_operand" "=3D&r")
> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 (match_operand:DI 1 "symbolic_pcrel=
64_operand"))
> +=C2=A0 (unspec:DI [(const_int 0)]
> +=C2=A0=C2=A0=C2=A0 UNSPEC_MOV_PCREL64)
> +=C2=A0 (use (reg:DI T3_REGNUM))
> +=C2=A0 (clobber (reg:DI T3_REGNUM))]

It's better not to hard code $t3 here.  We can write

[(set (match_operand:DI 0 "register_operand" "=3Dr")
      (match_operand:DI 1 "symbolic_pcrel64_operand"))
 (clobber (match_operand:DI 2 "register_operand "=3D&r"))]

And use

  gen_movdi_pcrel64 (operands[0], operands[1], gen_reg_rtx(DImode))

in expand.

> + "TARGET_64BIT"
> + "la.local %0,$r15,%1"
> + [(set_attr "mode" "DI")
> +=C2=A0 (set_attr "length" "5")])

--=20
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University