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Message-ID: <73d981766faf984e85722feb3eeabb5d335def4a.camel@xry111.site>
Subject: Re: [PATCH v4 0/6] Add Loongson SX/ASX instruction support to
 LoongArch target.
From: Xi Ruoyao <xry111@xry111.site>
To: Chenghui Pan <panchenghui@loongson.cn>, gcc-patches@gcc.gnu.org
Cc: i@xen0n.name, chenglulu@loongson.cn, xuchenghua@loongson.cn, 
	guojie@loongson.cn
Date: Sun, 20 Aug 2023 16:25:26 +0800
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On Thu, 2023-08-17 at 15:20 +0800, Chenghui Pan wrote:
> Seems ARMv8-A only guarantees to preserve low 64-bit value of
> NEON/floating-point register value. I'm not sure that I modify the
> testcase in the right way and maybe we need more investigations. Any
> ideas or suggestion?

Sorry, the following sentence in GCC manual section 6.47.5.2 suggests my
test case is not valid:

"As with global register variables, it is recommended that you choose a
register that is normally saved and restored by function calls on your
machine, so that calls to library routines will not clobber it."

So when I use asm(name), the compiler has no obligation to guarantee
that it will ever work like a normal variable after a function call.

But I still need to verify that the compiler correctly understands only
the low 64 bits of the vector register is saved.  I'll try to make
another test case...

--=20
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University