From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 82344 invoked by alias); 30 Aug 2018 15:54:07 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 82333 invoked by uid 89); 30 Aug 2018 15:54:06 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.2 spammy=phrase, exploiting X-HELO: EUR01-DB5-obe.outbound.protection.outlook.com Received: from mail-db5eur01on0046.outbound.protection.outlook.com (HELO EUR01-DB5-obe.outbound.protection.outlook.com) (104.47.2.46) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 30 Aug 2018 15:54:04 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=IxS36N7TGm2lfACcvd0Rl3xiCQJnpZNXZkpJUev3FnA=; b=ESIpR47kgDdEOXKco+G9EPaIlbKXjt9jQ30ZXaRpqIl1TfOLghIMmQWulRHEZePTvg10l23RFmo/au6WNGvOXjkCBYMbSHpurO4Sf1MH2Y6qndJf4CD8yHx56FNRJMty3upGHENRMl93COyZoPrBY9bCHdnAWgypcgtnHBSM9Yo= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Sam.Tebbs@arm.com; Received: from [10.2.206.249] (217.140.106.53) by AM6PR08MB3429.eurprd08.prod.outlook.com (2603:10a6:20b:44::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1101.14; Thu, 30 Aug 2018 15:54:00 +0000 Subject: Re: [GCC][PATCH v2][Aarch64] Exploiting BFXIL when OR-ing two AND-operations with appropriate bitmasks To: James Greenhalgh , "gcc-patches@gcc.gnu.org" Cc: Marcus Shawcroft , Richard Earnshaw , nd References: <44d5392a-f033-ed0d-d679-116b3eafa0b9@arm.com> <20180828225320.GE22590@arm.com> From: Sam Tebbs Message-ID: <77026f88-aaf9-cd08-99bd-05eee5c86f1e@arm.com> Date: Thu, 30 Aug 2018 15:54:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20180828225320.GE22590@arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Return-Path: sam.tebbs@arm.com Received-SPF: None (protection.outlook.com: arm.com does not designate permitted sender hosts) X-IsSubscribed: yes X-SW-Source: 2018-08/txt/msg01982.txt.bz2 On 08/28/2018 11:53 PM, James Greenhalgh wrote: > Hm, I'm not very sure about the naming here; "left consecutive" isn't a > common phrase to denote the mask you're looking for (exact_log2 (-i) != -1 > if I'm reading right), and is misleading 0x0000ffff is 'left consecutive' > too, just with zeroes rather than ones. > I think you're right about it not being the best naming. Do you have any suggestions for a better name? >> diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h >> index af5db9c595385f7586692258f750b6aceb3ed9c8..01d9e1bd634572fcfa60208ba4dc541805af5ccd 100644 >> --- a/gcc/config/aarch64/aarch64-protos.h >> +++ b/gcc/config/aarch64/aarch64-protos.h >> @@ -574,4 +574,6 @@ rtl_opt_pass *make_pass_fma_steering (gcc::context *ctxt); >> >> poly_uint64 aarch64_regmode_natural_size (machine_mode); >> >> +bool aarch64_is_left_consecutive (HOST_WIDE_INT); >> + >> #endif /* GCC_AARCH64_PROTOS_H */ >> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c >> index fa01475aa9ee579b6a3b2526295b622157120660..3cfa51b15af3e241672f1383cf881c12a44494a5 100644 >> --- a/gcc/config/aarch64/aarch64.c >> +++ b/gcc/config/aarch64/aarch64.c >> @@ -1454,6 +1454,14 @@ aarch64_hard_regno_caller_save_mode (unsigned regno, unsigned, >> return SImode; >> } >> >> +/* Implement IS_LEFT_CONSECUTIVE. Check if I's bits are consecutive > What is IS_LEFT_CONSECUTIVE - I don't see it elsewhere in the GCC code, so > what does the comment refer to implementing? Thanks for pointing out this mistake, it should read "AARCH64_IS_LEFT_CONSECUTIVE" to refer to the function definition in aarch64-protos.h. This will of course change once a better name is thought of. Thanks, Sam