[testsuite] Fix order of dg-do and dg-require-effective-target directives

[testsuite] Fix order of dg-do and dg-require-effective-target directives

[Christophe Lyon]

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I have noticed that both dg-do and dg-require-effective-target modify
the value of dg-do-what, which means that dg-do directives must appear
before dg-require-effective-target.

Indeed if the effective-target property is false, but dg-do is
executed later, the test would fail instead of being unsupported.

The attached patch fixes the order on the few testcases where I
noticed it was wrong.

Tested on several arm* and aarch64* targets/multilibs with no regression.

OK?

Christophe.

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2015-09-29  Christophe Lyon  <christophe.lyon@linaro.org>

	* g++.dg/cpp0x/stdint.C: Move dg-require-effective-target after
	dg-do.
	* g++.dg/gomp/tls-wrap4.C: Likewise.
	* gcc.dg/atomic-op-optimize.c: Likewise.
	* gcc.dg/pr54087.c: Likewise.
	* gcc.dg/tls/section-2.c: Likewise.
	* gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c:
	Likewise.
	* gcc.dg/vect/costmodel/ppc/costmodel-pr37194.c: Likewise.
	* gcc.dg/vect/trapv-vect-reduc-4.c: Likewise.
	* gcc.target/arm/divzero.c: Likewise.
	* gcc.target/arm/sibcall-2.c: Likewise.
	* gcc.target/arm/thumb1-Os-mult.c: Likewise.
	* gcc.target/arm/thumb1-load-64bit-constant-1.c: Likewise.
	* gcc.target/arm/thumb1-load-64bit-constant-2.c: Likewise.
	* gcc.target/arm/thumb1-load-64bit-constant-3.c: Likewise.
	* gcc.target/arm/volatile-bitfields-1.c: Likewise.
	* gcc.target/arm/volatile-bitfields-2.c: Likewise.
	* gcc.target/arm/volatile-bitfields-3.c: Likewise.
	* gcc.target/arm/volatile-bitfields-4.c: Likewise.
	* gfortran.dg/default_format_2.f90: Likewise.
	* gfortran.dg/default_format_denormal_2.f90: Likewise.

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diff --git a/gcc/testsuite/g++.dg/cpp0x/stdint.C b/gcc/testsuite/g++.dg/cpp0x/stdint.C
index 434d458..6c213d7 100644
--- a/gcc/testsuite/g++.dg/cpp0x/stdint.C
+++ b/gcc/testsuite/g++.dg/cpp0x/stdint.C
@@ -1,6 +1,6 @@
 // PR c++/52764
-// { dg-require-effective-target stdint_types }
 // { dg-do compile { target c++11 } }
+// { dg-require-effective-target stdint_types }
 
 #include <stdint.h>
 
diff --git a/gcc/testsuite/g++.dg/gomp/tls-wrap4.C b/gcc/testsuite/g++.dg/gomp/tls-wrap4.C
index 59a5683..dca249d 100644
--- a/gcc/testsuite/g++.dg/gomp/tls-wrap4.C
+++ b/gcc/testsuite/g++.dg/gomp/tls-wrap4.C
@@ -1,8 +1,8 @@
 // We don't need to call the wrapper through the PLT; we can use a separate
 // copy per shared object.
 
-// { dg-require-effective-target tls }
 // { dg-do compile { target c++11 } }
+// { dg-require-effective-target tls }
 // { dg-options "-fPIC" }
 // { dg-final { scan-assembler-not "_ZTW1i@PLT" { target i?86-*-* x86_64-*-* } } }
 
diff --git a/gcc/testsuite/gcc.dg/atomic-op-optimize.c b/gcc/testsuite/gcc.dg/atomic-op-optimize.c
index d2e960a..66efee4 100644
--- a/gcc/testsuite/gcc.dg/atomic-op-optimize.c
+++ b/gcc/testsuite/gcc.dg/atomic-op-optimize.c
@@ -2,8 +2,8 @@
    Test that it at happens on x86 by making sure there are 2 xchg's and no
    compare_exchange loop.  */
 
-/* { dg-require-effective-target sync_int_long } */
 /* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sync_int_long } */
 /* { dg-final { scan-assembler-times "cmpxchg" 0 } } */
 /* { dg-final { scan-assembler-times "xchg" 2 } } */
 
diff --git a/gcc/testsuite/gcc.dg/pr54087.c b/gcc/testsuite/gcc.dg/pr54087.c
index abb0af3..5874e9c 100644
--- a/gcc/testsuite/gcc.dg/pr54087.c
+++ b/gcc/testsuite/gcc.dg/pr54087.c
@@ -1,7 +1,7 @@
 /* PR54087.  Verify __atomic_sub (val) uses __atomic_add (-val) if there is no
              atomic_aub.  */
-/* { dg-require-effective-target sync_int_long } */
 /* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sync_int_long } */
 /* { dg-final { scan-assembler-times "xadd" 2 } } */
 
 
diff --git a/gcc/testsuite/gcc.dg/tls/section-2.c b/gcc/testsuite/gcc.dg/tls/section-2.c
index 8f11def..9c21307 100644
--- a/gcc/testsuite/gcc.dg/tls/section-2.c
+++ b/gcc/testsuite/gcc.dg/tls/section-2.c
@@ -1,7 +1,7 @@
 /* Verify that we get errors for trying to put TLS data in 
    sections which can't work.  */
-/* { dg-require-effective-target tls } */
 /* { dg-do compile { target *-*-vxworks } } */
+/* { dg-require-effective-target tls } */
 
 #define A(X)	__attribute__((section(X)))
 
diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c
index bf6053d..409e685 100644
--- a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c
@@ -1,5 +1,5 @@
-/* { dg-require-effective-target vect_int } */
 /* { dg-do compile } */
+/* { dg-require-effective-target vect_int } */
 
 #define N 16 
 
diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-pr37194.c b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-pr37194.c
index e0093c4..5b5dd1b 100644
--- a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-pr37194.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-pr37194.c
@@ -1,5 +1,5 @@
-/* { dg-require-effective-target vect_float } */
 /* { dg-do compile } */
+/* { dg-require-effective-target vect_float } */
 
 #include <stdlib.h>
 #include "../../tree-vect.h"
diff --git a/gcc/testsuite/gcc.dg/vect/trapv-vect-reduc-4.c b/gcc/testsuite/gcc.dg/vect/trapv-vect-reduc-4.c
index f801e76..d19d42c 100644
--- a/gcc/testsuite/gcc.dg/vect/trapv-vect-reduc-4.c
+++ b/gcc/testsuite/gcc.dg/vect/trapv-vect-reduc-4.c
@@ -1,5 +1,5 @@
-/* { dg-require-effective-target vect_int } */
 /* { dg-do compile } */
+/* { dg-require-effective-target vect_int } */
 
 #include <stdarg.h>
 #include "tree-vect.h"
diff --git a/gcc/testsuite/gcc.target/arm/divzero.c b/gcc/testsuite/gcc.target/arm/divzero.c
index 7d398a5..b005763 100644
--- a/gcc/testsuite/gcc.target/arm/divzero.c
+++ b/gcc/testsuite/gcc.target/arm/divzero.c
@@ -1,6 +1,6 @@
+/* { dg-do run } */
 /* { dg-require-effective-target arm_eabi } */
 /* { dg-options "" } */
-/* { dg-do run } */
 
 /* Check that long long divmod functions pass the right argument to
    __aeabi_ldiv0 on divide by zero.  */
diff --git a/gcc/testsuite/gcc.target/arm/sibcall-2.c b/gcc/testsuite/gcc.target/arm/sibcall-2.c
index 921c0f3..52cd307 100644
--- a/gcc/testsuite/gcc.target/arm/sibcall-2.c
+++ b/gcc/testsuite/gcc.target/arm/sibcall-2.c
@@ -1,5 +1,5 @@
-/* { dg-require-effective-target arm_eabi } */
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_eabi } */
 /* { dg-options "-O2 -mabi=aapcs" } */
 
 
diff --git a/gcc/testsuite/gcc.target/arm/thumb1-Os-mult.c b/gcc/testsuite/gcc.target/arm/thumb1-Os-mult.c
index 08d735c..b989c42 100644
--- a/gcc/testsuite/gcc.target/arm/thumb1-Os-mult.c
+++ b/gcc/testsuite/gcc.target/arm/thumb1-Os-mult.c
@@ -1,5 +1,5 @@
-/* { dg-require-effective-target arm_thumb1_ok } */
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb1_ok } */
 /* { dg-options "-Os" } */
 /* { dg-skip-if "" { ! { arm_thumb1 } } } */
 
diff --git a/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-1.c b/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-1.c
index 9537aaf..59e9a8d 100644
--- a/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-1.c
+++ b/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-1.c
@@ -1,5 +1,5 @@
-/* { dg-require-effective-target arm_thumb1_ok } */
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb1_ok } */
 /* { dg-options "-Os" } */
 /* { dg-skip-if "" { ! { arm_thumb1 } } } */
 
diff --git a/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-2.c b/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-2.c
index 836682b..f542ad3 100644
--- a/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-2.c
+++ b/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-2.c
@@ -1,5 +1,5 @@
-/* { dg-require-effective-target arm_thumb1_ok } */
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb1_ok } */
 /* { dg-options "-O2" } */
 /* { dg-skip-if "" { ! { arm_thumb1 } } } */
 
diff --git a/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-3.c b/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-3.c
index b53ed8b..0a18484 100644
--- a/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-3.c
+++ b/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-3.c
@@ -1,5 +1,5 @@
-/* { dg-require-effective-target arm_thumb1_ok } */
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb1_ok } */
 /* { dg-options "-Os" } */
 /* { dg-skip-if "" { ! { arm_thumb1 } } } */
 
diff --git a/gcc/testsuite/gcc.target/arm/volatile-bitfields-1.c b/gcc/testsuite/gcc.target/arm/volatile-bitfields-1.c
index c519419..d841ca1 100644
--- a/gcc/testsuite/gcc.target/arm/volatile-bitfields-1.c
+++ b/gcc/testsuite/gcc.target/arm/volatile-bitfields-1.c
@@ -1,5 +1,5 @@
-/* { dg-require-effective-target arm_eabi } */
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_eabi } */
 /* { dg-options "-O2" } */
 
 typedef struct {
diff --git a/gcc/testsuite/gcc.target/arm/volatile-bitfields-2.c b/gcc/testsuite/gcc.target/arm/volatile-bitfields-2.c
index eb0aaf7..ea1af39 100644
--- a/gcc/testsuite/gcc.target/arm/volatile-bitfields-2.c
+++ b/gcc/testsuite/gcc.target/arm/volatile-bitfields-2.c
@@ -1,5 +1,5 @@
-/* { dg-require-effective-target arm_eabi } */
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_eabi } */
 /* { dg-options "-O2" } */
 
 typedef struct {
diff --git a/gcc/testsuite/gcc.target/arm/volatile-bitfields-3.c b/gcc/testsuite/gcc.target/arm/volatile-bitfields-3.c
index 0f5dde0..4580da0 100644
--- a/gcc/testsuite/gcc.target/arm/volatile-bitfields-3.c
+++ b/gcc/testsuite/gcc.target/arm/volatile-bitfields-3.c
@@ -1,5 +1,5 @@
-/* { dg-require-effective-target arm_eabi } */
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_eabi } */
 /* { dg-options "-O2" } */
 
 typedef struct {
diff --git a/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c b/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c
index 805dab1..4256965 100644
--- a/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c
+++ b/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c
@@ -1,5 +1,5 @@
-/* { dg-require-effective-target arm_eabi } */
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_eabi } */
 /* { dg-options "-O2" } */
 /* { dg-final { scan-assembler-times "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */
 /* { dg-final { scan-assembler-times "str\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */
diff --git a/gcc/testsuite/gfortran.dg/default_format_2.f90 b/gcc/testsuite/gfortran.dg/default_format_2.f90
index e970090..9c5af7b 100644
--- a/gcc/testsuite/gfortran.dg/default_format_2.f90
+++ b/gcc/testsuite/gfortran.dg/default_format_2.f90
@@ -1,5 +1,5 @@
-! { dg-require-effective-target fortran_large_real }
 ! { dg-do run { xfail powerpc*-apple-darwin* powerpc*-*-linux* } }
+! { dg-require-effective-target fortran_large_real }
 ! Test XFAILed on these platforms because the system's printf() lacks
 ! proper support for denormalized long doubles. See PR24685
 !
diff --git a/gcc/testsuite/gfortran.dg/default_format_denormal_2.f90 b/gcc/testsuite/gfortran.dg/default_format_denormal_2.f90
index 6134a56..58cd987 100644
--- a/gcc/testsuite/gfortran.dg/default_format_denormal_2.f90
+++ b/gcc/testsuite/gfortran.dg/default_format_denormal_2.f90
@@ -1,5 +1,5 @@
-! { dg-require-effective-target fortran_large_real }
 ! { dg-do run { xfail powerpc*-apple-darwin* } }
+! { dg-require-effective-target fortran_large_real }
 ! Test XFAILed on this platform because the system's printf() lacks
 ! proper support for denormalized long doubles. See PR24685
 !

Re: [testsuite] Fix order of dg-do and dg-require-effective-target directives

[Mike Stump]

On Sep 29, 2015, at 1:29 PM, Christophe Lyon <christophe.lyon@linaro.org> wrote:
> The attached patch fixes the order on the few testcases where I
> noticed it was wrong.

> OK?

Ok.

Re: [testsuite] Fix order of dg-do and dg-require-effective-target directives

[Christophe Lyon]

On 22 March 2018 at 17:33, Kyrill  Tkachov <kyrylo.tkachov@foss.arm.com> wrote:
> Hi Christophe,
>
> On 22/03/18 16:31, Christophe Lyon wrote:
>>
>> Hi,
>>
>> I've noticed 3 tests where dg-do appears after
>> dg-require-effective-target.
>> This small patch fixes that.
>>
>> OK for stage4?
>>
>
> Ok for the arm tests.
> I would argue that these changes are obvious though.
>
OK, I went ahead and committed it.

Thanks,

Christophe

> Thanks,
> Kyrill
>
>> Thanks,
>>
>> Christophe
>
>

Re: [testsuite] Fix order of dg-do and dg-require-effective-target directives

[Kyrill Tkachov]

Hi Christophe,

On 22/03/18 16:31, Christophe Lyon wrote:
> Hi,
>
> I've noticed 3 tests where dg-do appears after dg-require-effective-target.
> This small patch fixes that.
>
> OK for stage4?
>

Ok for the arm tests.
I would argue that these changes are obvious though.

Thanks,
Kyrill

> Thanks,
>
> Christophe

[testsuite] Fix order of dg-do and dg-require-effective-target directives

[Christophe Lyon]

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Hi,

I've noticed 3 tests where dg-do appears after dg-require-effective-target.
This small patch fixes that.

OK for stage4?

Thanks,

Christophe

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commit 068c140ced3946c477a92b145ced33c0c045b4db
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date:   Thu Mar 22 16:04:39 2018 +0000

    [testsuite] Make sure dg-do is before dg-require-effective-target.
    
    2018-03-22  Christophe Lyon  <christophe.lyon@linaro.org>
    
    	* gcc.target/arm/addr-modes-float.c: Move dg-do before
    	dg-require-effective-target.
    	* gcc.target/arm/addr-modes-int.c: Likewise.
    	* gcc.target/nios2/lo-addr-tls.c: Likewise.
    
    Change-Id: Ie2e7eea647fddbf15c4c7adec24e3e561dca42da

diff --git a/gcc/testsuite/gcc.target/arm/addr-modes-float.c b/gcc/testsuite/gcc.target/arm/addr-modes-float.c
index 5ffbcb1..4527dd3 100644
--- a/gcc/testsuite/gcc.target/arm/addr-modes-float.c
+++ b/gcc/testsuite/gcc.target/arm/addr-modes-float.c
@@ -1,7 +1,7 @@
+/* { dg-do compile } */
 /* { dg-options "-O2" } */
 /* { dg-require-effective-target arm_neon_ok } */
 /* { dg-add-options arm_neon } */
-/* { dg-do compile } */
 
 #include <arm_neon.h>
 
diff --git a/gcc/testsuite/gcc.target/arm/addr-modes-int.c b/gcc/testsuite/gcc.target/arm/addr-modes-int.c
index 90b7425..faedca0 100644
--- a/gcc/testsuite/gcc.target/arm/addr-modes-int.c
+++ b/gcc/testsuite/gcc.target/arm/addr-modes-int.c
@@ -1,7 +1,7 @@
+/* { dg-do compile } */
 /* { dg-options "-O2 -march=armv7-a" } */
-/* { dg-add-options arm_neon } */
 /* { dg-require-effective-target arm_neon_ok } */
-/* { dg-do compile } */
+/* { dg-add-options arm_neon } */
 
 #include "addr-modes.h"
 
diff --git a/gcc/testsuite/gcc.target/nios2/lo-addr-tls.c b/gcc/testsuite/gcc.target/nios2/lo-addr-tls.c
index d56fbc2..53060a1 100644
--- a/gcc/testsuite/gcc.target/nios2/lo-addr-tls.c
+++ b/gcc/testsuite/gcc.target/nios2/lo-addr-tls.c
@@ -1,5 +1,5 @@
-/* { dg-require-effective-target tls } */
 /* { dg-do compile } */
+/* { dg-require-effective-target tls } */
 /* { dg-options "-O2" } */
 /* { dg-final { scan-assembler-not "ldw\tr., %lo" } } */
 /* { dg-final { scan-assembler-not "stw\tr., %lo" } } */