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From: Cooper Qu <cooper.qu@linux.alibaba.com>
To: Geng Qi <gengqi@linux.alibaba.com>, gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] C-SKY: Support for fpuv2:fldrd/fstrd and fpuv3:fldr.64/fstr.64.
Date: Wed, 26 May 2021 10:17:23 +0800	[thread overview]
Message-ID: <789616b4-1f28-8d24-ae20-4e10f0d5a641@linux.alibaba.com> (raw)
In-Reply-To: <20210430130408.1865-1-gengqi@linux.alibaba.com>

Is any test case for these instructions?

On 4/30/21 9:04 PM, Geng Qi wrote:
> gcc/ChangeLog:
>
> 	* config/csky/csky.c (ck810_legitimate_index_p): Modified for
> 	support "base + index" with DF mode.
> 	* config/csky/constraints.md ("Y"): New constraint for memory operands
> 	without index register.
> 	* config/csky/csky_insn_fpuv2.md
> 	(fpuv3_movdf):At constraints, use "Y" instead of "m" where mov between
> 	memory and general registers, and put them baskwards.
> 	* config/csky/csky_insn_fpuv3.md
> 	(fpuv2_movdf): Likewise.
> ---
>   gcc/config/csky/constraints.md     |  4 ++++
>   gcc/config/csky/csky.c             |  3 ++-
>   gcc/config/csky/csky_insn_fpuv2.md |  4 ++--
>   gcc/config/csky/csky_insn_fpuv3.md | 16 ++++++++--------
>   4 files changed, 16 insertions(+), 11 deletions(-)
>
> diff --git a/gcc/config/csky/constraints.md b/gcc/config/csky/constraints.md
> index c9bc9f2..2641ab3 100644
> --- a/gcc/config/csky/constraints.md
> +++ b/gcc/config/csky/constraints.md
> @@ -38,6 +38,10 @@
>     "Memory operands with base register, index register"
>     (match_test "csky_valid_mem_constraint_operand (op, \"W\")"))
>   
> +(define_memory_constraint "Y"
> +  "Memory operands without index register"
> +  (not (match_test "csky_valid_mem_constraint_operand (op, \"W\")")))
> +
>   (define_constraint "R"
>     "Memory operands whose address is a label_ref"
>     (and (match_code "mem")
> diff --git a/gcc/config/csky/csky.c b/gcc/config/csky/csky.c
> index e4c92fe..e55821f 100644
> --- a/gcc/config/csky/csky.c
> +++ b/gcc/config/csky/csky.c
> @@ -3136,7 +3136,8 @@ ck810_legitimate_index_p (machine_mode mode, rtx index, int strict_p)
>     /* The follow index is for ldr instruction, the ldr cannot
>        load dword data, so the mode size should not be larger than
>        4.  */
> -  else if (GET_MODE_SIZE (mode) <= 4)
> +  else if (GET_MODE_SIZE (mode) <= 4
> +	   || (TARGET_HARD_FLOAT && CSKY_VREG_MODE_P (mode)))
>       {
>         if (is_csky_address_register_rtx_p (index, strict_p))
>   	return 1;
> diff --git a/gcc/config/csky/csky_insn_fpuv2.md b/gcc/config/csky/csky_insn_fpuv2.md
> index 0a680f8..5a06b22 100644
> --- a/gcc/config/csky/csky_insn_fpuv2.md
> +++ b/gcc/config/csky/csky_insn_fpuv2.md
> @@ -461,8 +461,8 @@
>   )
>   
>   (define_insn "*fpuv2_movdf"
> -  [(set (match_operand:DF 0 "nonimmediate_operand" "=r,r, r,m, v,?r,Q,v,v,v")
> -	(match_operand:DF 1 "general_operand"      " r,m,mF,r,?r, v,v,Q,v,m"))]
> +  [(set (match_operand:DF 0 "nonimmediate_operand" "=r, v,?r,Q,v,v,v,r, r,Y")
> +	(match_operand:DF 1 "general_operand"      " r,?r, v,v,Q,v,m,Y,YF,r"))]
>     "CSKY_ISA_FEATURE (fpv2_df)"
>     "* return csky_output_movedouble(operands, DFmode);"
>     [(set (attr "length")
> diff --git a/gcc/config/csky/csky_insn_fpuv3.md b/gcc/config/csky/csky_insn_fpuv3.md
> index 053673c..7849795 100644
> --- a/gcc/config/csky/csky_insn_fpuv3.md
> +++ b/gcc/config/csky/csky_insn_fpuv3.md
> @@ -71,27 +71,27 @@
>   )
>   
>   (define_insn "*fpv3_movdf"
> -  [(set (match_operand:DF 0 "nonimmediate_operand" "=r,r, r,m,v,?r,Q,v,v,v, v")
> -	(match_operand:DF 1 "general_operand"      " r,m,mF,r,?r,v,v,Q,v,m,Dv"))]
> +  [(set (match_operand:DF 0 "nonimmediate_operand" "=r, v,?r,Q,v,v,v, v,r, r,Y")
> +	(match_operand:DF 1 "general_operand"      " r,?r, v,v,Q,v,m,Dv,Y,YF,r"))]
>     "CSKY_ISA_FEATURE(fpv3_df)"
>     "*
>     switch (which_alternative)
>       {
> -    case 4:
> +    case 1:
>         if (TARGET_BIG_ENDIAN)
>   	return \"fmtvr.64\\t%0, %R1, %1\";
>         return \"fmtvr.64\\t%0, %1, %R1\";
> -    case 5:
> +    case 2:
>         if (TARGET_BIG_ENDIAN)
>   	return \"fmfvr.64\\t%R0, %0, %1\";
>         return \"fmfvr.64\\t%0, %R0, %1\";
> +    case 3:
> +    case 4:
>       case 6:
> -    case 7:
> -    case 9:
>         return fpuv3_output_move(operands);
> -    case 8:
> +    case 5:
>         return \"fmov.64\\t%0, %1\";
> -    case 10:
> +    case 7:
>         return \"fmovi.64\\t%0, %1\";
>       default:
>         return csky_output_movedouble(operands, DFmode);

      reply	other threads:[~2021-05-26  2:17 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-30 13:04 Geng Qi
2021-05-26  2:17 ` Cooper Qu [this message]

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