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From: "juzhe.zhong@rivai.ai" <juzhe.zhong@rivai.ai>
To: "Robin Dapp" <rdapp.gcc@gmail.com>,
	 gcc-patches <gcc-patches@gcc.gnu.org>,
	 palmer <palmer@dabbelt.com>,  kito.cheng <kito.cheng@gmail.com>,
	 jeffreyalaw <jeffreyalaw@gmail.com>
Cc: "Robin Dapp" <rdapp.gcc@gmail.com>
Subject: Re: Re: [PATCH] RISC-V: vsetvl: Refine REG_EQUAL equality.
Date: Mon, 13 Nov 2023 16:15:03 +0800	[thread overview]
Message-ID: <79FFE7862F3DE5E4+2023111316150312672414@rivai.ai> (raw)
In-Reply-To: <8b929bb2-1bf7-4303-922d-61dec54afe04@gmail.com>

[-- Attachment #1: Type: text/plain, Size: 658 bytes --]

I know the root cause is:

(reg:DI 15 a5 [orig:175 _103 ] [175])(reg:DI 15 a5 [orig:174 _100 ] [174])

is considered as true on rtx_equal_p.

I think return note1 == note2; will simplify your codes and fix this issue.



juzhe.zhong@rivai.ai
 
From: Robin Dapp
Date: 2023-11-13 16:12
To: juzhe.zhong@rivai.ai; gcc-patches; palmer; kito.cheng; jeffreyalaw
CC: rdapp.gcc
Subject: Re: [PATCH] RISC-V: vsetvl: Refine REG_EQUAL equality.
> Does this patch fixes exposed bugs in current tests?
> Or could you add test for it ?
 
Ah, yes forgot to mention.  This fixes several tests when
testing with -march=rv64gcv_zbb.
 
Regards
Robin
 

  reply	other threads:[~2023-11-13  8:15 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-13  8:06 Robin Dapp
2023-11-13  8:10 ` juzhe.zhong
2023-11-13  8:12   ` Robin Dapp
2023-11-13  8:15     ` juzhe.zhong [this message]
2023-11-13 13:44       ` Jeff Law
2023-11-13  8:19     ` juzhe.zhong
2023-11-13  8:25     ` juzhe.zhong
2023-11-13  9:25       ` Robin Dapp
2023-11-13  9:30         ` juzhe.zhong
2023-11-13  9:34           ` Robin Dapp
2023-11-13  9:38             ` juzhe.zhong
2023-11-13 10:31               ` Robin Dapp
2023-11-13 10:36                 ` juzhe.zhong
2023-11-13 13:28                   ` Robin Dapp
2023-11-13 13:34                     ` 钟居哲
2023-11-13 14:47                       ` Robin Dapp
2023-11-13 18:01                         ` Jeff Law

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