From: 钟居哲 <juzhe.zhong@rivai.ai>
To: rdapp.gcc <rdapp.gcc@gmail.com>,
gcc-patches <gcc-patches@gcc.gnu.org>,
palmer <palmer@dabbelt.com>, kito.cheng <kito.cheng@gmail.com>,
"Jeff Law" <jeffreyalaw@gmail.com>
Cc: rdapp.gcc <rdapp.gcc@gmail.com>
Subject: Re: [PATCH] RISC-V: Disallow 64-bit indexed loads and stores for rv32gcv.
Date: Wed, 15 Nov 2023 22:17:57 +0800 [thread overview]
Message-ID: <7F0E2F8092AA4045+2023111522175715837064@rivai.ai> (raw)
In-Reply-To: <b03b88ad-caea-43b9-af11-307d8d82edc0@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 210577 bytes --]
>> - "TARGET_VECTOR"
>>+ "TARGET_VECTOR
>>+ && GET_MODE_BITSIZE (GET_MODE_INNER (<VINDEX>mode))
>>+ <= GET_MODE_BITSIZE (Pmode)"
Remove all of them (GET_MODE_BITSIZE (GET_MODE_INNER (<VINDEX>mode)) <= GET_MODE_BITSIZE (Pmode)).
(define_mode_attr VDEMOTE [
(RVVM8DI "RVVM8SI") (RVVM4DI "RVVM4SI") (RVVM2DI "RVVM2SI") (RVVM1DI "RVVM1SI")
- (V1DI "V1SI")
- (V2DI "V2SI")
- (V4DI "V4SI")
- (V8DI "V8SI")
- (V16DI "V16SI")
- (V32DI "V32SI")
- (V64DI "V64SI")
- (V128DI "V128SI")
- (V256DI "V256SI")
- (V512DI "V512SI")
+ (V1DI "V2SI")
+ (V2DI "V4SI")
+ (V4DI "V8SI")
+ (V8DI "V16SI")
+ (V16DI "V32SI")
+ (V32DI "V64SI")
+ (V64DI "V128SI")
+ (V128DI "V256SI")
+ (V256DI "V512SI")
+ (V512DI "V1024SI")
])
(define_mode_attr VMDEMOTE [
(RVVM8DI "RVVMF4BI") (RVVM4DI "RVVMF8BI") (RVVM2DI "RVVMF16BI") (RVVM1DI "RVVMF32BI")
- (V1DI "V1BI")
- (V2DI "V2BI")
- (V4DI "V4BI")
- (V8DI "V8BI")
- (V16DI "V16BI")
- (V32DI "V32BI")
- (V64DI "V64BI")
- (V128DI "V128BI")
- (V256DI "V256BI")
- (V512DI "V512BI")
+ (V1DI "V2BI")
+ (V2DI "V4BI")
+ (V4DI "V8BI")
+ (V8DI "V16BI")
+ (V16DI "V32BI")
+ (V32DI "V64BI")
+ (V64DI "V128BI")
+ (V128DI "V256BI")
+ (V256DI "V512BI")
+ (V512DI "V1024BI")
])
Looks wrong. Recover back.
Otherwise, LGTM.
juzhe.zhong@rivai.ai
From: Robin Dapp
Date: 2023-11-15 22:01
To: gcc-patches; palmer; Kito Cheng; jeffreyalaw; juzhe.zhong@rivai.ai
CC: rdapp.gcc
Subject: [PATCH] RISC-V: Disallow 64-bit indexed loads and stores for rv32gcv.
Hi,
we currently allow 64-bit indices/offsets for vector indexed loads
and stores even on rv32 but we should not, according to RVV spec 18.3:
The V extension supports all vector load and store instructions
(Section Vector Loads and Stores), except the V extension does not
support EEW=64 for index values when XLEN=32.
Interestingly, spike only raises a SIGILL for e.g. vluxei64 with
rv32gc_zve32 but not with rv32gcv while qemu does.
This patch adjusts the iterators as well as the insn conditions to
reflect the RVV spec.
It also fixes an oversight in the VLS modes of the demote iterators
that was found while testing the patch.
Regards
Robin
gcc/ChangeLog:
* config/riscv/riscv-v.cc (gather_scatter_valid_offset_mode_p):
Add check for XLEN == 32.
* config/riscv/vector-iterators.md: Change VLS part of the
demote iterator to 2x elements modes
* config/riscv/vector.md: Adjust iterators and insn conditions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-1.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-1.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-10.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-10.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-11.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-11.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-12.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-12.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-2.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-2.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-3.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-3.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-4.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-4.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-5.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-5.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-6.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-6.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-7.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-7.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-8.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-8.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-9.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-9.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-1.c:
Adjust include.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-10.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-11.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-6.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-7.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-8.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-9.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-1.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-1.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-10.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-10.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-11.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-11.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-2.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-2.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-3.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-3.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-4.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-4.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-5.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-5.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-6.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-6.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-7.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-7.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-8.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-8.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-9.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-9.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-1.c:
Adjust include.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-10.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-11.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-6.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-7.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-8.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-9.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-1.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-1.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-10.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-10.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-2.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-2.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-3.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-3.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-4.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-4.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-5.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-5.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-6.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-6.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-7.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-7.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-8.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-8.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-9.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-9.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-1.c:
Adjust include.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-10.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-6.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-7.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-8.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-9.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-1.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-1.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-10.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-10.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-3.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-2.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-4.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-4.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-5.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-5.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-6.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-6.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-7.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-7.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-8.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-8.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-9.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-9.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-2.c: Moved to...
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-2.c: ...here.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-1.c:
Adjust include.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-10.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-6.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-7.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-8.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-9.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-1.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-10.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-11.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-12.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-2.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-3.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-4.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-5.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-6.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-7.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-8.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-9.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-1.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-10.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-11.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-2.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-3.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-4.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-5.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-6.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-7.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-8.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-9.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-1.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-10.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-2.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-3.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-4.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-5.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-6.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-7.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-8.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-9.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-1.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-10.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-3.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-4.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-5.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-6.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-7.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-8.c: New test.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-9.c: New test.
---
gcc/config/riscv/riscv-v.cc | 9 +-
gcc/config/riscv/vector-iterators.md | 48 ++++----
gcc/config/riscv/vector.md | 16 ++-
.../autovec/gather-scatter/gather_load_32-1.c | 40 ++++++
.../gather-scatter/gather_load_32-10.c | 37 ++++++
.../gather-scatter/gather_load_32-11.c | 34 ++++++
.../{gather_load-12.c => gather_load_32-12.c} | 0
.../autovec/gather-scatter/gather_load_32-2.c | 40 ++++++
.../autovec/gather-scatter/gather_load_32-3.c | 37 ++++++
.../autovec/gather-scatter/gather_load_32-4.c | 37 ++++++
.../autovec/gather-scatter/gather_load_32-5.c | 37 ++++++
.../autovec/gather-scatter/gather_load_32-6.c | 37 ++++++
.../autovec/gather-scatter/gather_load_32-7.c | 37 ++++++
.../autovec/gather-scatter/gather_load_32-8.c | 37 ++++++
.../autovec/gather-scatter/gather_load_32-9.c | 37 ++++++
.../{gather_load-1.c => gather_load_64-1.c} | 2 +-
.../{gather_load-10.c => gather_load_64-10.c} | 2 +-
.../{gather_load-11.c => gather_load_64-11.c} | 2 +-
.../gather-scatter/gather_load_64-12.c | 110 +++++++++++++++++
.../{gather_load-2.c => gather_load_64-2.c} | 2 +-
.../{gather_load-3.c => gather_load_64-3.c} | 2 +-
.../{gather_load-4.c => gather_load_64-4.c} | 2 +-
.../{gather_load-5.c => gather_load_64-5.c} | 2 +-
.../{gather_load-6.c => gather_load_64-6.c} | 2 +-
.../{gather_load-7.c => gather_load_64-7.c} | 2 +-
.../{gather_load-8.c => gather_load_64-8.c} | 2 +-
.../{gather_load-9.c => gather_load_64-9.c} | 2 +-
.../gather-scatter/gather_load_run-1.c | 2 +-
.../gather-scatter/gather_load_run-10.c | 2 +-
.../gather-scatter/gather_load_run-11.c | 2 +-
.../gather-scatter/gather_load_run-12.c | 2 +-
.../gather-scatter/gather_load_run-2.c | 2 +-
.../gather-scatter/gather_load_run-3.c | 2 +-
.../gather-scatter/gather_load_run-4.c | 2 +-
.../gather-scatter/gather_load_run-5.c | 2 +-
.../gather-scatter/gather_load_run-6.c | 2 +-
.../gather-scatter/gather_load_run-7.c | 2 +-
.../gather-scatter/gather_load_run-8.c | 2 +-
.../gather-scatter/gather_load_run-9.c | 2 +-
.../gather-scatter/mask_gather_load_32-1.c | 41 +++++++
.../gather-scatter/mask_gather_load_32-10.c | 38 ++++++
...her_load-11.c => mask_gather_load_32-11.c} | 2 +-
.../gather-scatter/mask_gather_load_32-2.c | 41 +++++++
.../gather-scatter/mask_gather_load_32-3.c | 38 ++++++
.../gather-scatter/mask_gather_load_32-4.c | 38 ++++++
.../gather-scatter/mask_gather_load_32-5.c | 38 ++++++
.../gather-scatter/mask_gather_load_32-6.c | 38 ++++++
.../gather-scatter/mask_gather_load_32-7.c | 38 ++++++
.../gather-scatter/mask_gather_load_32-8.c | 38 ++++++
.../gather-scatter/mask_gather_load_32-9.c | 38 ++++++
...ather_load-1.c => mask_gather_load_64-1.c} | 2 +-
...her_load-10.c => mask_gather_load_64-10.c} | 2 +-
.../gather-scatter/mask_gather_load_64-11.c | 114 ++++++++++++++++++
...ather_load-2.c => mask_gather_load_64-2.c} | 2 +-
...ather_load-3.c => mask_gather_load_64-3.c} | 2 +-
...ather_load-4.c => mask_gather_load_64-4.c} | 2 +-
...ather_load-5.c => mask_gather_load_64-5.c} | 2 +-
...ather_load-6.c => mask_gather_load_64-6.c} | 2 +-
...ather_load-7.c => mask_gather_load_64-7.c} | 2 +-
...ather_load-8.c => mask_gather_load_64-8.c} | 2 +-
...ather_load-9.c => mask_gather_load_64-9.c} | 2 +-
.../gather-scatter/mask_gather_load_run-1.c | 2 +-
.../gather-scatter/mask_gather_load_run-10.c | 2 +-
.../gather-scatter/mask_gather_load_run-11.c | 2 +-
.../gather-scatter/mask_gather_load_run-2.c | 2 +-
.../gather-scatter/mask_gather_load_run-3.c | 2 +-
.../gather-scatter/mask_gather_load_run-4.c | 2 +-
.../gather-scatter/mask_gather_load_run-5.c | 2 +-
.../gather-scatter/mask_gather_load_run-6.c | 2 +-
.../gather-scatter/mask_gather_load_run-7.c | 2 +-
.../gather-scatter/mask_gather_load_run-8.c | 2 +-
.../gather-scatter/mask_gather_load_run-9.c | 2 +-
.../gather-scatter/mask_scatter_store_32-1.c | 41 +++++++
.../gather-scatter/mask_scatter_store_32-10.c | 38 ++++++
.../gather-scatter/mask_scatter_store_32-2.c | 41 +++++++
.../gather-scatter/mask_scatter_store_32-3.c | 38 ++++++
.../gather-scatter/mask_scatter_store_32-4.c | 38 ++++++
.../gather-scatter/mask_scatter_store_32-5.c | 38 ++++++
.../gather-scatter/mask_scatter_store_32-6.c | 38 ++++++
.../gather-scatter/mask_scatter_store_32-7.c | 38 ++++++
.../gather-scatter/mask_scatter_store_32-8.c | 38 ++++++
.../gather-scatter/mask_scatter_store_32-9.c | 43 +++++++
...er_store-1.c => mask_scatter_store_64-1.c} | 2 +-
..._store-10.c => mask_scatter_store_64-10.c} | 2 +-
...er_store-2.c => mask_scatter_store_64-2.c} | 2 +-
...er_store-3.c => mask_scatter_store_64-3.c} | 2 +-
...er_store-4.c => mask_scatter_store_64-4.c} | 2 +-
...er_store-5.c => mask_scatter_store_64-5.c} | 2 +-
...er_store-6.c => mask_scatter_store_64-6.c} | 2 +-
...er_store-7.c => mask_scatter_store_64-7.c} | 2 +-
...er_store-8.c => mask_scatter_store_64-8.c} | 2 +-
...er_store-9.c => mask_scatter_store_64-9.c} | 2 +-
.../gather-scatter/mask_scatter_store_run-1.c | 2 +-
.../mask_scatter_store_run-10.c | 2 +-
.../gather-scatter/mask_scatter_store_run-2.c | 2 +-
.../gather-scatter/mask_scatter_store_run-3.c | 2 +-
.../gather-scatter/mask_scatter_store_run-4.c | 2 +-
.../gather-scatter/mask_scatter_store_run-5.c | 2 +-
.../gather-scatter/mask_scatter_store_run-6.c | 2 +-
.../gather-scatter/mask_scatter_store_run-7.c | 2 +-
.../gather-scatter/mask_scatter_store_run-8.c | 2 +-
.../gather-scatter/mask_scatter_store_run-9.c | 2 +-
.../gather-scatter/scatter_store_32-1.c | 40 ++++++
.../gather-scatter/scatter_store_32-10.c | 37 ++++++
.../gather-scatter/scatter_store_32-2.c | 37 ++++++
.../gather-scatter/scatter_store_32-4.c | 37 ++++++
.../gather-scatter/scatter_store_32-5.c | 37 ++++++
.../gather-scatter/scatter_store_32-6.c | 37 ++++++
.../gather-scatter/scatter_store_32-7.c | 37 ++++++
.../gather-scatter/scatter_store_32-8.c | 37 ++++++
.../gather-scatter/scatter_store_32-9.c | 37 ++++++
...scatter_store-1.c => scatter_store_64-1.c} | 2 +-
...atter_store-10.c => scatter_store_64-10.c} | 2 +-
...scatter_store-2.c => scatter_store_64-2.c} | 2 +-
...scatter_store-3.c => scatter_store_64-3.c} | 2 +-
...scatter_store-4.c => scatter_store_64-4.c} | 2 +-
...scatter_store-5.c => scatter_store_64-5.c} | 2 +-
...scatter_store-6.c => scatter_store_64-6.c} | 2 +-
...scatter_store-7.c => scatter_store_64-7.c} | 2 +-
...scatter_store-8.c => scatter_store_64-8.c} | 2 +-
...scatter_store-9.c => scatter_store_64-9.c} | 2 +-
.../gather-scatter/scatter_store_run-1.c | 2 +-
.../gather-scatter/scatter_store_run-10.c | 2 +-
.../gather-scatter/scatter_store_run-2.c | 2 +-
.../gather-scatter/scatter_store_run-3.c | 2 +-
.../gather-scatter/scatter_store_run-4.c | 2 +-
.../gather-scatter/scatter_store_run-5.c | 2 +-
.../gather-scatter/scatter_store_run-6.c | 2 +-
.../gather-scatter/scatter_store_run-7.c | 2 +-
.../gather-scatter/scatter_store_run-8.c | 2 +-
.../gather-scatter/scatter_store_run-9.c | 2 +-
131 files changed, 1876 insertions(+), 114 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-10.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-11.c
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{gather_load-12.c => gather_load_32-12.c} (100%)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-4.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-5.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-6.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-7.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-8.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-9.c
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{gather_load-1.c => gather_load_64-1.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{gather_load-10.c => gather_load_64-10.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{gather_load-11.c => gather_load_64-11.c} (94%)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-12.c
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{gather_load-2.c => gather_load_64-2.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{gather_load-3.c => gather_load_64-3.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{gather_load-4.c => gather_load_64-4.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{gather_load-5.c => gather_load_64-5.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{gather_load-6.c => gather_load_64-6.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{gather_load-7.c => gather_load_64-7.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{gather_load-8.c => gather_load_64-8.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{gather_load-9.c => gather_load_64-9.c} (95%)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-10.c
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_gather_load-11.c => mask_gather_load_32-11.c} (99%)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-4.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-5.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-6.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-7.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-8.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-9.c
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_gather_load-1.c => mask_gather_load_64-1.c} (94%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_gather_load-10.c => mask_gather_load_64-10.c} (94%)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-11.c
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_gather_load-2.c => mask_gather_load_64-2.c} (94%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_gather_load-3.c => mask_gather_load_64-3.c} (94%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_gather_load-4.c => mask_gather_load_64-4.c} (94%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_gather_load-5.c => mask_gather_load_64-5.c} (94%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_gather_load-6.c => mask_gather_load_64-6.c} (94%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_gather_load-7.c => mask_gather_load_64-7.c} (94%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_gather_load-8.c => mask_gather_load_64-8.c} (94%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_gather_load-9.c => mask_gather_load_64-9.c} (94%)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-10.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-4.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-5.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-6.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-7.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-8.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-9.c
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_scatter_store-1.c => mask_scatter_store_64-1.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_scatter_store-10.c => mask_scatter_store_64-10.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_scatter_store-2.c => mask_scatter_store_64-2.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_scatter_store-3.c => mask_scatter_store_64-3.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_scatter_store-4.c => mask_scatter_store_64-4.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_scatter_store-5.c => mask_scatter_store_64-5.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_scatter_store-6.c => mask_scatter_store_64-6.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_scatter_store-7.c => mask_scatter_store_64-7.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_scatter_store-8.c => mask_scatter_store_64-8.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{mask_scatter_store-9.c => mask_scatter_store_64-9.c} (95%)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-10.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-4.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-5.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-6.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-7.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-8.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-9.c
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{scatter_store-1.c => scatter_store_64-1.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{scatter_store-10.c => scatter_store_64-10.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{scatter_store-2.c => scatter_store_64-2.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{scatter_store-3.c => scatter_store_64-3.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{scatter_store-4.c => scatter_store_64-4.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{scatter_store-5.c => scatter_store_64-5.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{scatter_store-6.c => scatter_store_64-6.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{scatter_store-7.c => scatter_store_64-7.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{scatter_store-8.c => scatter_store_64-8.c} (95%)
rename gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/{scatter_store-9.c => scatter_store_64-9.c} (95%)
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 265a298f447..62b3a8fd411 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -3932,7 +3932,14 @@ bool
gather_scatter_valid_offset_mode_p (machine_mode mode)
{
machine_mode new_mode;
- return get_vector_mode (Pmode, GET_MODE_NUNITS (mode)).exists (&new_mode);
+ /* RISC-V V Spec 18.3:
+ The V extension supports all vector load and store instructions (Section
+ Vector Loads and Stores), except the V extension does not support EEW=64
+ for index values when XLEN=32. */
+
+ if (GET_MODE_BITSIZE (GET_MODE_INNER (mode)) <= GET_MODE_BITSIZE (Pmode))
+ return get_vector_mode (Pmode, GET_MODE_NUNITS (mode)).exists (&new_mode);
+ return false;
}
/* We don't have to convert the floating point to integer when the
diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md
index f04c7fe5491..86539dacc9d 100644
--- a/gcc/config/riscv/vector-iterators.md
+++ b/gcc/config/riscv/vector-iterators.md
@@ -944,28 +944,28 @@ (define_mode_iterator RATIO64I [
(RVVMF8QI "TARGET_MIN_VLEN > 32")
(RVVMF4HI "TARGET_MIN_VLEN > 32")
(RVVMF2SI "TARGET_MIN_VLEN > 32")
- (RVVM1DI "TARGET_VECTOR_ELEN_64")
+ (RVVM1DI "TARGET_VECTOR_ELEN_64 && TARGET_64BIT")
])
(define_mode_iterator RATIO32I [
RVVMF4QI
RVVMF2HI
RVVM1SI
- (RVVM2DI "TARGET_VECTOR_ELEN_64")
+ (RVVM2DI "TARGET_VECTOR_ELEN_64 && TARGET_64BIT")
])
(define_mode_iterator RATIO16I [
RVVMF2QI
RVVM1HI
RVVM2SI
- (RVVM4DI "TARGET_VECTOR_ELEN_64")
+ (RVVM4DI "TARGET_VECTOR_ELEN_64 && TARGET_64BIT")
])
(define_mode_iterator RATIO8I [
RVVM1QI
RVVM2HI
RVVM4SI
- (RVVM8DI "TARGET_VECTOR_ELEN_64")
+ (RVVM8DI "TARGET_VECTOR_ELEN_64 && TARGET_64BIT")
])
(define_mode_iterator RATIO4I [
@@ -3432,30 +3432,30 @@ (define_mode_iterator V_VLS_F_CONVERT_DI [
(define_mode_attr VDEMOTE [
(RVVM8DI "RVVM8SI") (RVVM4DI "RVVM4SI") (RVVM2DI "RVVM2SI") (RVVM1DI "RVVM1SI")
- (V1DI "V1SI")
- (V2DI "V2SI")
- (V4DI "V4SI")
- (V8DI "V8SI")
- (V16DI "V16SI")
- (V32DI "V32SI")
- (V64DI "V64SI")
- (V128DI "V128SI")
- (V256DI "V256SI")
- (V512DI "V512SI")
+ (V1DI "V2SI")
+ (V2DI "V4SI")
+ (V4DI "V8SI")
+ (V8DI "V16SI")
+ (V16DI "V32SI")
+ (V32DI "V64SI")
+ (V64DI "V128SI")
+ (V128DI "V256SI")
+ (V256DI "V512SI")
+ (V512DI "V1024SI")
])
(define_mode_attr VMDEMOTE [
(RVVM8DI "RVVMF4BI") (RVVM4DI "RVVMF8BI") (RVVM2DI "RVVMF16BI") (RVVM1DI "RVVMF32BI")
- (V1DI "V1BI")
- (V2DI "V2BI")
- (V4DI "V4BI")
- (V8DI "V8BI")
- (V16DI "V16BI")
- (V32DI "V32BI")
- (V64DI "V64BI")
- (V128DI "V128BI")
- (V256DI "V256BI")
- (V512DI "V512BI")
+ (V1DI "V2BI")
+ (V2DI "V4BI")
+ (V4DI "V8BI")
+ (V8DI "V16BI")
+ (V16DI "V32BI")
+ (V32DI "V64BI")
+ (V64DI "V128BI")
+ (V128DI "V256BI")
+ (V256DI "V512BI")
+ (V512DI "V1024BI")
])
(define_mode_attr stride_predicate [
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index d1499d330ff..28b2e0c2b94 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -2216,7 +2216,9 @@ (define_insn "@pred_indexed_<order>load<mode>_same_eew"
(mem:BLK (scratch))
(match_operand:<VINDEX> 4 "register_operand" " vr, vr,vr, vr")] ORDER)
(match_operand:V 2 "vector_merge_operand" " vu, vu, 0, 0")))]
- "TARGET_VECTOR"
+ "TARGET_VECTOR
+ && GET_MODE_BITSIZE (GET_MODE_INNER (<VINDEX>mode))
+ <= GET_MODE_BITSIZE (Pmode)"
"vl<order>xei<sew>.v\t%0,(%z3),%4%p1"
[(set_attr "type" "vld<order>x")
(set_attr "mode" "<MODE>")])
@@ -2302,7 +2304,9 @@ (define_insn "@pred_indexed_<order>load<mode>_x2_smaller_eew"
(mem:BLK (scratch))
(match_operand:<VINDEX_DOUBLE_EXT> 4 "register_operand" " 0, 0, 0, 0, vr, vr")] ORDER)
(match_operand:VEEWTRUNC2 2 "vector_merge_operand" " vu, 0, vu, 0, vu, 0")))]
- "TARGET_VECTOR"
+ "TARGET_VECTOR
+ && GET_MODE_BITSIZE (GET_MODE_INNER (<VINDEX_DOUBLE_EXT>mode))
+ <= GET_MODE_BITSIZE (Pmode)"
"vl<order>xei<double_ext_sew>.v\t%0,(%z3),%4%p1"
[(set_attr "type" "vld<order>x")
(set_attr "mode" "<MODE>")])
@@ -2323,7 +2327,9 @@ (define_insn "@pred_indexed_<order>load<mode>_x4_smaller_eew"
(mem:BLK (scratch))
(match_operand:<VINDEX_QUAD_EXT> 4 "register_operand" " 0, 0, 0, 0, vr, vr")] ORDER)
(match_operand:VEEWTRUNC4 2 "vector_merge_operand" " vu, 0, vu, 0, vu, 0")))]
- "TARGET_VECTOR"
+ "TARGET_VECTOR
+ && GET_MODE_BITSIZE (GET_MODE_INNER (<VINDEX_QUAD_EXT>mode))
+ <= GET_MODE_BITSIZE (Pmode)"
"vl<order>xei<quad_ext_sew>.v\t%0,(%z3),%4%p1"
[(set_attr "type" "vld<order>x")
(set_attr "mode" "<MODE>")])
@@ -2344,7 +2350,9 @@ (define_insn "@pred_indexed_<order>load<mode>_x8_smaller_eew"
(mem:BLK (scratch))
(match_operand:<VINDEX_OCT_EXT> 4 "register_operand" " 0, 0, 0, 0, vr, vr")] ORDER)
(match_operand:VEEWTRUNC8 2 "vector_merge_operand" " vu, 0, vu, 0, vu, 0")))]
- "TARGET_VECTOR"
+ "TARGET_VECTOR
+ && GET_MODE_BITSIZE (GET_MODE_INNER (<VINDEX_OCT_EXT>mode))
+ <= GET_MODE_BITSIZE (Pmode)"
"vl<order>xei<oct_ext_sew>.v\t%0,(%z3),%4%p1"
[(set_attr "type" "vld<order>x")
(set_attr "mode" "<MODE>")])
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-1.c
new file mode 100644
index 00000000000..8ae5106b8a0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-1.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 uint8_t
+#define INDEX16 uint16_t
+#define INDEX32 uint32_t
+#define INDEX64 uint64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-10.c
new file mode 100644
index 00000000000..d705c920a2b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-10.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX64 int64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 64) \
+ T (uint8_t, 64) \
+ T (int16_t, 64) \
+ T (uint16_t, 64) \
+ T (_Float16, 64) \
+ T (int32_t, 64) \
+ T (uint32_t, 64) \
+ T (float, 64) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-11.c
new file mode 100644
index 00000000000..4e183cd9170
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-11.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define TEST_LOOP(DATA_TYPE) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict *src) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[i] += *src[i]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t) \
+ T (uint8_t) \
+ T (int16_t) \
+ T (uint16_t) \
+ T (_Float16) \
+ T (int32_t) \
+ T (uint32_t) \
+ T (float) \
+ T (int64_t) \
+ T (uint64_t) \
+ T (double)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-12.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-12.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-12.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-2.c
new file mode 100644
index 00000000000..e4e42fef972
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-2.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 int8_t
+#define INDEX16 int16_t
+#define INDEX32 int32_t
+#define INDEX64 int64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-3.c
new file mode 100644
index 00000000000..e385fee109d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-3.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 uint8_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 8) \
+ T (uint16_t, 8) \
+ T (_Float16, 8) \
+ T (int32_t, 8) \
+ T (uint32_t, 8) \
+ T (float, 8) \
+ T (int64_t, 8) \
+ T (uint64_t, 8) \
+ T (double, 8)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-4.c
new file mode 100644
index 00000000000..e5cb19de42f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-4.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 int8_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 8) \
+ T (uint16_t, 8) \
+ T (_Float16, 8) \
+ T (int32_t, 8) \
+ T (uint32_t, 8) \
+ T (float, 8) \
+ T (int64_t, 8) \
+ T (uint64_t, 8) \
+ T (double, 8)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-5.c
new file mode 100644
index 00000000000..a437e7393ee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-5.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX16 uint16_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 16) \
+ T (uint8_t, 16) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 16) \
+ T (uint32_t, 16) \
+ T (float, 16) \
+ T (int64_t, 16) \
+ T (uint64_t, 16) \
+ T (double, 16)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-6.c
new file mode 100644
index 00000000000..487dca9928b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-6.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX16 int16_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 16) \
+ T (uint8_t, 16) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 16) \
+ T (uint32_t, 16) \
+ T (float, 16) \
+ T (int64_t, 16) \
+ T (uint64_t, 16) \
+ T (double, 16)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-7.c
new file mode 100644
index 00000000000..ff91929b8e7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-7.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX32 uint32_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 32) \
+ T (uint8_t, 32) \
+ T (int16_t, 32) \
+ T (uint16_t, 32) \
+ T (_Float16, 32) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 32) \
+ T (uint64_t, 32) \
+ T (double, 32)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-8.c
new file mode 100644
index 00000000000..81df57fcbd2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-8.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX32 int32_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 32) \
+ T (uint8_t, 32) \
+ T (int16_t, 32) \
+ T (uint16_t, 32) \
+ T (_Float16, 32) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 32) \
+ T (uint64_t, 32) \
+ T (double, 32)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-9.c
new file mode 100644
index 00000000000..238b6bce042
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_32-9.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX64 uint64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 64) \
+ T (uint8_t, 64) \
+ T (int16_t, 64) \
+ T (uint16_t, 64) \
+ T (_Float16, 64) \
+ T (int32_t, 64) \
+ T (uint32_t, 64) \
+ T (float, 64) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-1.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-1.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-1.c
index 3b26bf1dec2..eabe0124b69 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-10.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-10.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-10.c
index 63949cbe02b..ba4bc780344 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-10.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-11.c
similarity index 94%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-11.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-11.c
index 8dc1da3f4b4..e75b6948ab5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-11.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-12.c
new file mode 100644
index 00000000000..d8daf3fa1db
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-12.c
@@ -0,0 +1,110 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define TEST_LOOP(DATA_TYPE, INDEX_TYPE) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE##_##INDEX_TYPE (DATA_TYPE *restrict y, DATA_TYPE *restrict x, \
+ INDEX_TYPE *restrict index) \
+ { \
+ for (int i = 0; i < 100; ++i) \
+ { \
+ y[i * 2] = x[index[i * 2]] + 1; \
+ y[i * 2 + 1] = x[index[i * 2 + 1]] + 2; \
+ } \
+ }
+
+TEST_LOOP (int8_t, int8_t)
+TEST_LOOP (uint8_t, int8_t)
+TEST_LOOP (int16_t, int8_t)
+TEST_LOOP (uint16_t, int8_t)
+TEST_LOOP (int32_t, int8_t)
+TEST_LOOP (uint32_t, int8_t)
+TEST_LOOP (int64_t, int8_t)
+TEST_LOOP (uint64_t, int8_t)
+TEST_LOOP (_Float16, int8_t)
+TEST_LOOP (float, int8_t)
+TEST_LOOP (double, int8_t)
+TEST_LOOP (int8_t, int16_t)
+TEST_LOOP (uint8_t, int16_t)
+TEST_LOOP (int16_t, int16_t)
+TEST_LOOP (uint16_t, int16_t)
+TEST_LOOP (int32_t, int16_t)
+TEST_LOOP (uint32_t, int16_t)
+TEST_LOOP (int64_t, int16_t)
+TEST_LOOP (uint64_t, int16_t)
+TEST_LOOP (_Float16, int16_t)
+TEST_LOOP (float, int16_t)
+TEST_LOOP (double, int16_t)
+TEST_LOOP (int8_t, int32_t)
+TEST_LOOP (uint8_t, int32_t)
+TEST_LOOP (int16_t, int32_t)
+TEST_LOOP (uint16_t, int32_t)
+TEST_LOOP (int32_t, int32_t)
+TEST_LOOP (uint32_t, int32_t)
+TEST_LOOP (int64_t, int32_t)
+TEST_LOOP (uint64_t, int32_t)
+TEST_LOOP (_Float16, int32_t)
+TEST_LOOP (float, int32_t)
+TEST_LOOP (double, int32_t)
+TEST_LOOP (int8_t, int64_t)
+TEST_LOOP (uint8_t, int64_t)
+TEST_LOOP (int16_t, int64_t)
+TEST_LOOP (uint16_t, int64_t)
+TEST_LOOP (int32_t, int64_t)
+TEST_LOOP (uint32_t, int64_t)
+TEST_LOOP (int64_t, int64_t)
+TEST_LOOP (uint64_t, int64_t)
+TEST_LOOP (_Float16, int64_t)
+TEST_LOOP (float, int64_t)
+TEST_LOOP (double, int64_t)
+TEST_LOOP (int8_t, uint8_t)
+TEST_LOOP (uint8_t, uint8_t)
+TEST_LOOP (int16_t, uint8_t)
+TEST_LOOP (uint16_t, uint8_t)
+TEST_LOOP (int32_t, uint8_t)
+TEST_LOOP (uint32_t, uint8_t)
+TEST_LOOP (int64_t, uint8_t)
+TEST_LOOP (uint64_t, uint8_t)
+TEST_LOOP (_Float16, uint8_t)
+TEST_LOOP (float, uint8_t)
+TEST_LOOP (double, uint8_t)
+TEST_LOOP (int8_t, uint16_t)
+TEST_LOOP (uint8_t, uint16_t)
+TEST_LOOP (int16_t, uint16_t)
+TEST_LOOP (uint16_t, uint16_t)
+TEST_LOOP (int32_t, uint16_t)
+TEST_LOOP (uint32_t, uint16_t)
+TEST_LOOP (int64_t, uint16_t)
+TEST_LOOP (uint64_t, uint16_t)
+TEST_LOOP (_Float16, uint16_t)
+TEST_LOOP (float, uint16_t)
+TEST_LOOP (double, uint16_t)
+TEST_LOOP (int8_t, uint32_t)
+TEST_LOOP (uint8_t, uint32_t)
+TEST_LOOP (int16_t, uint32_t)
+TEST_LOOP (uint16_t, uint32_t)
+TEST_LOOP (int32_t, uint32_t)
+TEST_LOOP (uint32_t, uint32_t)
+TEST_LOOP (int64_t, uint32_t)
+TEST_LOOP (uint64_t, uint32_t)
+TEST_LOOP (_Float16, uint32_t)
+TEST_LOOP (float, uint32_t)
+TEST_LOOP (double, uint32_t)
+TEST_LOOP (int8_t, uint64_t)
+TEST_LOOP (uint8_t, uint64_t)
+TEST_LOOP (int16_t, uint64_t)
+TEST_LOOP (uint16_t, uint64_t)
+TEST_LOOP (int32_t, uint64_t)
+TEST_LOOP (uint32_t, uint64_t)
+TEST_LOOP (int64_t, uint64_t)
+TEST_LOOP (uint64_t, uint64_t)
+TEST_LOOP (_Float16, uint64_t)
+TEST_LOOP (float, uint64_t)
+TEST_LOOP (double, uint64_t)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 88 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-2.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-2.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-2.c
index 89e4b40bfd8..3389bc4bb76 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-2.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-3.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-3.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-3.c
index 02fd37c026d..b23603a76e6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-3.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-4.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-4.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-4.c
index af6a76af7f8..024710344f8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-4.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-5.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-5.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-5.c
index bd9a449086e..19ff214c062 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-5.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-6.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-6.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-6.c
index 6d776af4c5c..fd7684b5aab 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-6.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-7.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-7.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-7.c
index 040300a3e2a..9800b93a04c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-7.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-8.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-8.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-8.c
index 9223bf0057d..4f84fe158b8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-8.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-9.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-9.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-9.c
index 2e06fe6090d..41a7ae578e9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-9.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-1.c
index 232873ccd88..3ca1b0c6e08 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-1.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "gather_load-1.c"
+#include "gather_load_64-1.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-10.c
index 9696a21e3cf..ef1517a737d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-10.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "gather_load-10.c"
+#include "gather_load_64-10.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-11.c
index 459a1a8f4d7..c4355842faa 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-11.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "gather_load-11.c"
+#include "gather_load_64-11.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c
index 1cbf507fad1..d48d5295a06 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "gather_load-12.c"
+#include "gather_load_64-12.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-2.c
index 93a07e00e96..b1290ec393d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-2.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "gather_load-2.c"
+#include "gather_load_64-2.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-3.c
index f318a4373e9..8b8687013ec 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-3.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "gather_load-3.c"
+#include "gather_load_64-3.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-4.c
index a210cdf53e2..2085474f4ac 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-4.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "gather_load-4.c"
+#include "gather_load_64-4.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-5.c
index ade9175e85d..ad918131b56 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-5.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "gather_load-5.c"
+#include "gather_load_64-5.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-6.c
index f5bdece406d..53b32543bad 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-6.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "gather_load-6.c"
+#include "gather_load_64-6.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-7.c
index 47a178362e0..8e135a7022c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-7.c
@@ -5,7 +5,7 @@
compiles properly. */
/* { dg-additional-options "-mcmodel=medany" } */
-#include "gather_load-7.c"
+#include "gather_load_64-7.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-8.c
index 1ce180404d7..8f13ec67a2a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-8.c
@@ -5,7 +5,7 @@
compiles properly. */
/* { dg-additional-options "-mcmodel=medany" } */
-#include "gather_load-8.c"
+#include "gather_load_64-8.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-9.c
index 3c08c634823..2e17075e548 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-9.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "gather_load-9.c"
+#include "gather_load_64-9.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-1.c
new file mode 100644
index 00000000000..055e392739d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-1.c
@@ -0,0 +1,41 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 uint8_t
+#define INDEX16 uint16_t
+#define INDEX32 uint32_t
+#define INDEX64 uint64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-10.c
new file mode 100644
index 00000000000..5582ca7c0b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-10.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX64 int64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 64) \
+ T (uint8_t, 64) \
+ T (int16_t, 64) \
+ T (uint16_t, 64) \
+ T (_Float16, 64) \
+ T (int32_t, 64) \
+ T (uint32_t, 64) \
+ T (float, 64) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-11.c
similarity index 99%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-11.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-11.c
index e5741812b21..54392f4512f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-11.c
@@ -107,7 +107,7 @@ TEST_LOOP (_Float16, uint64_t)
TEST_LOOP (float, uint64_t)
TEST_LOOP (double, uint64_t)
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 88 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 64 "vect" } } */
/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-2.c
new file mode 100644
index 00000000000..a2d135854bf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-2.c
@@ -0,0 +1,41 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 int8_t
+#define INDEX16 int16_t
+#define INDEX32 int32_t
+#define INDEX64 int64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-3.c
new file mode 100644
index 00000000000..66aa5c21bf0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-3.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 uint8_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 8) \
+ T (uint16_t, 8) \
+ T (_Float16, 8) \
+ T (int32_t, 8) \
+ T (uint32_t, 8) \
+ T (float, 8) \
+ T (int64_t, 8) \
+ T (uint64_t, 8) \
+ T (double, 8)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-4.c
new file mode 100644
index 00000000000..80c43de2f12
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-4.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 int8_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 8) \
+ T (uint16_t, 8) \
+ T (_Float16, 8) \
+ T (int32_t, 8) \
+ T (uint32_t, 8) \
+ T (float, 8) \
+ T (int64_t, 8) \
+ T (uint64_t, 8) \
+ T (double, 8)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-5.c
new file mode 100644
index 00000000000..972f021dda0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-5.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX16 uint16_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 16) \
+ T (uint8_t, 16) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 16) \
+ T (uint32_t, 16) \
+ T (float, 16) \
+ T (int64_t, 16) \
+ T (uint64_t, 16) \
+ T (double, 16)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-6.c
new file mode 100644
index 00000000000..33114baebc7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-6.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX16 int16_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 16) \
+ T (uint8_t, 16) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 16) \
+ T (uint32_t, 16) \
+ T (float, 16) \
+ T (int64_t, 16) \
+ T (uint64_t, 16) \
+ T (double, 16)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-7.c
new file mode 100644
index 00000000000..729fce09cf9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-7.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX32 uint32_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 32) \
+ T (uint8_t, 32) \
+ T (int16_t, 32) \
+ T (uint16_t, 32) \
+ T (_Float16, 32) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 32) \
+ T (uint64_t, 32) \
+ T (double, 32)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-8.c
new file mode 100644
index 00000000000..c6f6e88fda3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-8.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX32 int32_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 32) \
+ T (uint8_t, 32) \
+ T (int16_t, 32) \
+ T (uint16_t, 32) \
+ T (_Float16, 32) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 32) \
+ T (uint64_t, 32) \
+ T (double, 32)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-9.c
new file mode 100644
index 00000000000..3629496e324
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_32-9.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX64 uint64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[i] += src[indices[i]]; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 64) \
+ T (uint8_t, 64) \
+ T (int16_t, 64) \
+ T (uint16_t, 64) \
+ T (_Float16, 64) \
+ T (int32_t, 64) \
+ T (uint32_t, 64) \
+ T (float, 64) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-1.c
similarity index 94%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-1.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-1.c
index abab3b90af9..154c53539e3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fno-schedule-insns -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-10.c
similarity index 94%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-10.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-10.c
index 61ab1fb0021..c0fe926287b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-10.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fno-schedule-insns -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-11.c
new file mode 100644
index 00000000000..2a382734442
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-11.c
@@ -0,0 +1,114 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fno-schedule-insns -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define TEST_LOOP(DATA_TYPE, INDEX_TYPE) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE##_##INDEX_TYPE (DATA_TYPE *restrict y, DATA_TYPE *restrict x, \
+ INDEX_TYPE *restrict index, \
+ INDEX_TYPE *restrict cond) \
+ { \
+ for (int i = 0; i < 100; ++i) \
+ { \
+ if (cond[i * 2]) \
+ y[i * 2] = x[index[i * 2]] + 1; \
+ if (cond[i * 2 + 1]) \
+ y[i * 2 + 1] = x[index[i * 2 + 1]] + 2; \
+ } \
+ }
+
+TEST_LOOP (int8_t, int8_t)
+TEST_LOOP (uint8_t, int8_t)
+TEST_LOOP (int16_t, int8_t)
+TEST_LOOP (uint16_t, int8_t)
+TEST_LOOP (int32_t, int8_t)
+TEST_LOOP (uint32_t, int8_t)
+TEST_LOOP (int64_t, int8_t)
+TEST_LOOP (uint64_t, int8_t)
+TEST_LOOP (_Float16, int8_t)
+TEST_LOOP (float, int8_t)
+TEST_LOOP (double, int8_t)
+TEST_LOOP (int8_t, int16_t)
+TEST_LOOP (uint8_t, int16_t)
+TEST_LOOP (int16_t, int16_t)
+TEST_LOOP (uint16_t, int16_t)
+TEST_LOOP (int32_t, int16_t)
+TEST_LOOP (uint32_t, int16_t)
+TEST_LOOP (int64_t, int16_t)
+TEST_LOOP (uint64_t, int16_t)
+TEST_LOOP (_Float16, int16_t)
+TEST_LOOP (float, int16_t)
+TEST_LOOP (double, int16_t)
+TEST_LOOP (int8_t, int32_t)
+TEST_LOOP (uint8_t, int32_t)
+TEST_LOOP (int16_t, int32_t)
+TEST_LOOP (uint16_t, int32_t)
+TEST_LOOP (int32_t, int32_t)
+TEST_LOOP (uint32_t, int32_t)
+TEST_LOOP (int64_t, int32_t)
+TEST_LOOP (uint64_t, int32_t)
+TEST_LOOP (_Float16, int32_t)
+TEST_LOOP (float, int32_t)
+TEST_LOOP (double, int32_t)
+TEST_LOOP (int8_t, int64_t)
+TEST_LOOP (uint8_t, int64_t)
+TEST_LOOP (int16_t, int64_t)
+TEST_LOOP (uint16_t, int64_t)
+TEST_LOOP (int32_t, int64_t)
+TEST_LOOP (uint32_t, int64_t)
+TEST_LOOP (int64_t, int64_t)
+TEST_LOOP (uint64_t, int64_t)
+TEST_LOOP (_Float16, int64_t)
+TEST_LOOP (float, int64_t)
+TEST_LOOP (double, int64_t)
+TEST_LOOP (int8_t, uint8_t)
+TEST_LOOP (uint8_t, uint8_t)
+TEST_LOOP (int16_t, uint8_t)
+TEST_LOOP (uint16_t, uint8_t)
+TEST_LOOP (int32_t, uint8_t)
+TEST_LOOP (uint32_t, uint8_t)
+TEST_LOOP (int64_t, uint8_t)
+TEST_LOOP (uint64_t, uint8_t)
+TEST_LOOP (_Float16, uint8_t)
+TEST_LOOP (float, uint8_t)
+TEST_LOOP (double, uint8_t)
+TEST_LOOP (int8_t, uint16_t)
+TEST_LOOP (uint8_t, uint16_t)
+TEST_LOOP (int16_t, uint16_t)
+TEST_LOOP (uint16_t, uint16_t)
+TEST_LOOP (int32_t, uint16_t)
+TEST_LOOP (uint32_t, uint16_t)
+TEST_LOOP (int64_t, uint16_t)
+TEST_LOOP (uint64_t, uint16_t)
+TEST_LOOP (_Float16, uint16_t)
+TEST_LOOP (float, uint16_t)
+TEST_LOOP (double, uint16_t)
+TEST_LOOP (int8_t, uint32_t)
+TEST_LOOP (uint8_t, uint32_t)
+TEST_LOOP (int16_t, uint32_t)
+TEST_LOOP (uint16_t, uint32_t)
+TEST_LOOP (int32_t, uint32_t)
+TEST_LOOP (uint32_t, uint32_t)
+TEST_LOOP (int64_t, uint32_t)
+TEST_LOOP (uint64_t, uint32_t)
+TEST_LOOP (_Float16, uint32_t)
+TEST_LOOP (float, uint32_t)
+TEST_LOOP (double, uint32_t)
+TEST_LOOP (int8_t, uint64_t)
+TEST_LOOP (uint8_t, uint64_t)
+TEST_LOOP (int16_t, uint64_t)
+TEST_LOOP (uint16_t, uint64_t)
+TEST_LOOP (int32_t, uint64_t)
+TEST_LOOP (uint32_t, uint64_t)
+TEST_LOOP (int64_t, uint64_t)
+TEST_LOOP (uint64_t, uint64_t)
+TEST_LOOP (_Float16, uint64_t)
+TEST_LOOP (float, uint64_t)
+TEST_LOOP (double, uint64_t)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 88 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_GATHER_LOAD" "vect" } } */
+/* { dg-final { scan-assembler-not {vlse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*zero} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-2.c
similarity index 94%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-2.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-2.c
index cc5f52e0c34..b586d64da29 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-2.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fno-schedule-insns -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-3.c
similarity index 94%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-3.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-3.c
index 311e25ea199..11818a19e51 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-3.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fno-schedule-insns -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-4.c
similarity index 94%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-4.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-4.c
index 9223df9c4a2..3660198f7e5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-4.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fno-schedule-insns -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-5.c
similarity index 94%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-5.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-5.c
index 9ec7e60dc68..30589741e97 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-5.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fno-schedule-insns -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-6.c
similarity index 94%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-6.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-6.c
index ff18009fba1..a8cc99ac86a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-6.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fno-schedule-insns -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-7.c
similarity index 94%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-7.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-7.c
index fd05df7b381..9639235475f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-7.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fno-schedule-insns -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-8.c
similarity index 94%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-8.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-8.c
index a58c1c22042..a2526eaf72f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-8.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fno-schedule-insns -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-9.c
similarity index 94%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-9.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-9.c
index 36947db76ba..0eb57440b2d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_64-9.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fno-schedule-insns -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fno-schedule-insns -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-1.c
index fb342859044..913d2f7a7fe 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-1.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_gather_load-1.c"
+#include "mask_gather_load_64-1.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-10.c
index 531f298691f..3336a18d340 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-10.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_gather_load-10.c"
+#include "mask_gather_load_64-10.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-11.c
index 0ce20a8394e..eba0be9c319 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-11.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
/* { dg-additional-options "-mcmodel=medany" } */
-#include "mask_gather_load-11.c"
+#include "mask_gather_load_64-11.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-2.c
index 8bb78aeaa24..50a94905a3d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-2.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_gather_load-2.c"
+#include "mask_gather_load_64-2.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-3.c
index 0472ed0aaeb..ba93eb8b40a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-3.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_gather_load-3.c"
+#include "mask_gather_load_64-3.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-4.c
index 4fab81af280..d96fc13eda0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-4.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_gather_load-4.c"
+#include "mask_gather_load_64-4.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-5.c
index 8db1ea11fd2..05fdae37540 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-5.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_gather_load-5.c"
+#include "mask_gather_load_64-5.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-6.c
index d58bc80394c..175ce086bb1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-6.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_gather_load-6.c"
+#include "mask_gather_load_64-6.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-7.c
index cc495718b11..5a82541e9ba 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-7.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
/* { dg-additional-options "-mcmodel=medany" } */
-#include "mask_gather_load-7.c"
+#include "mask_gather_load_64-7.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-8.c
index 47459855135..4195f26886f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-8.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
/* { dg-additional-options "-mcmodel=medany" } */
-#include "mask_gather_load-8.c"
+#include "mask_gather_load_64-8.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-9.c
index 32924f0df70..686d0a5119d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-9.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_gather_load-9.c"
+#include "mask_gather_load_64-9.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-1.c
new file mode 100644
index 00000000000..5b427765416
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-1.c
@@ -0,0 +1,41 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 uint8_t
+#define INDEX16 uint16_t
+#define INDEX32 uint32_t
+#define INDEX64 uint64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-10.c
new file mode 100644
index 00000000000..d96c96dab2b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-10.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX64 int64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 64) \
+ T (uint8_t, 64) \
+ T (int16_t, 64) \
+ T (uint16_t, 64) \
+ T (_Float16, 64) \
+ T (int32_t, 64) \
+ T (uint32_t, 64) \
+ T (float, 64) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-2.c
new file mode 100644
index 00000000000..ca939831d26
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-2.c
@@ -0,0 +1,41 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 int8_t
+#define INDEX16 int16_t
+#define INDEX32 int32_t
+#define INDEX64 int64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-3.c
new file mode 100644
index 00000000000..60f3a66c8ad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-3.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 uint8_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 8) \
+ T (uint16_t, 8) \
+ T (_Float16, 8) \
+ T (int32_t, 8) \
+ T (uint32_t, 8) \
+ T (float, 8) \
+ T (int64_t, 8) \
+ T (uint64_t, 8) \
+ T (double, 8)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-4.c
new file mode 100644
index 00000000000..36f316df9ad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-4.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 int8_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 8) \
+ T (uint16_t, 8) \
+ T (_Float16, 8) \
+ T (int32_t, 8) \
+ T (uint32_t, 8) \
+ T (float, 8) \
+ T (int64_t, 8) \
+ T (uint64_t, 8) \
+ T (double, 8)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-5.c
new file mode 100644
index 00000000000..df58b3dedbc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-5.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX16 uint16_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 16) \
+ T (uint8_t, 16) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 16) \
+ T (uint32_t, 16) \
+ T (float, 16) \
+ T (int64_t, 16) \
+ T (uint64_t, 16) \
+ T (double, 16)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-6.c
new file mode 100644
index 00000000000..c2da72ae4a2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-6.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX16 int16_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 16) \
+ T (uint8_t, 16) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 16) \
+ T (uint32_t, 16) \
+ T (float, 16) \
+ T (int64_t, 16) \
+ T (uint64_t, 16) \
+ T (double, 16)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-7.c
new file mode 100644
index 00000000000..e6bdd366a96
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-7.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX32 uint32_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 32) \
+ T (uint8_t, 32) \
+ T (int16_t, 32) \
+ T (uint16_t, 32) \
+ T (_Float16, 32) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 32) \
+ T (uint64_t, 32) \
+ T (double, 32)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-8.c
new file mode 100644
index 00000000000..3ae681dbea5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-8.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX32 int32_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 32) \
+ T (uint8_t, 32) \
+ T (int16_t, 32) \
+ T (uint16_t, 32) \
+ T (_Float16, 32) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 32) \
+ T (uint64_t, 32) \
+ T (double, 32)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-9.c
new file mode 100644
index 00000000000..be5077f8614
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_32-9.c
@@ -0,0 +1,43 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* For some reason we exceed
+ the default code model's +-2 GiB limits. We should investigate why and
+ add a proper description here. For now just make sure the test case
+ compiles properly. */
+/* { dg-additional-options "-mcmodel=medany" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX64 uint64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices, INDEX##BITS *restrict cond) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ if (cond[i]) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 64) \
+ T (uint8_t, 64) \
+ T (int16_t, 64) \
+ T (uint16_t, 64) \
+ T (_Float16, 64) \
+ T (int32_t, 64) \
+ T (uint32_t, 64) \
+ T (float, 64) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 8 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-1.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-1.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-1.c
index 0099ed357c4..27c982aa354 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-10.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-10.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-10.c
index 089ec487c47..93f33696a20 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-10.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-2.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-2.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-2.c
index 57a1acec099..cbb22507ad3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-2.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-3.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-3.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-3.c
index ba89eb35db2..93a84056b92 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-3.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-4.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-4.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-4.c
index 2d6499fea56..c5816e06fdd 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-4.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-5.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-5.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-5.c
index f55db716cd9..c140d05b15e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-5.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-6.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-6.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-6.c
index a7ec2796834..41a03d31b70 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-6.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-7.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-7.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-7.c
index b7bd3f415d5..f29ae25e8cc 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-7.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-8.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-8.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-8.c
index f2ab86519bd..8d72d98fb49 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-8.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-9.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-9.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-9.c
index 42ce1c5364f..dfd9412376d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_64-9.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
/* For some reason we exceed
the default code model's +-2 GiB limits. We should investigate why and
add a proper description here. For now just make sure the test case
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-1.c
index cf89555aca3..077bf827df2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-1.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_scatter_store-1.c"
+#include "mask_scatter_store_64-1.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-10.c
index 6e5dc5dc0a7..a1e8df1b71f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-10.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_scatter_store-10.c"
+#include "mask_scatter_store_64-10.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-2.c
index 197b4436432..5ee27174883 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-2.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_scatter_store-2.c"
+#include "mask_scatter_store_64-2.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-3.c
index 81059e4f7de..b77fb634163 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-3.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_scatter_store-3.c"
+#include "mask_scatter_store_64-3.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-4.c
index a50b6d2e44e..0a8b4a5ba53 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-4.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_scatter_store-4.c"
+#include "mask_scatter_store_64-4.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-5.c
index 645e3a57a6b..8eca62bcdfa 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-5.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_scatter_store-5.c"
+#include "mask_scatter_store_64-5.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-6.c
index 52032ba1b36..4bcaf426cfe 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-6.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_scatter_store-6.c"
+#include "mask_scatter_store_64-6.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-7.c
index 38b05958042..7e4b1d8076b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-7.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
/* { dg-additional-options "-mcmodel=medany" } */
-#include "mask_scatter_store-7.c"
+#include "mask_scatter_store_64-7.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-8.c
index fcb311067b0..0189aa8ea45 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-8.c
@@ -5,7 +5,7 @@
compiles properly. */
/* { dg-additional-options "-mcmodel=medany" } */
-#include "mask_scatter_store-8.c"
+#include "mask_scatter_store_64-8.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-9.c
index c120e681f73..e2a3a8ca407 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-9.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "mask_scatter_store-9.c"
+#include "mask_scatter_store_64-9.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-1.c
new file mode 100644
index 00000000000..4ad244b8e83
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-1.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 uint8_t
+#define INDEX16 uint16_t
+#define INDEX32 uint32_t
+#define INDEX64 uint64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-10.c
new file mode 100644
index 00000000000..a44cbc18b68
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-10.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX64 int64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 64) \
+ T (uint8_t, 64) \
+ T (int16_t, 64) \
+ T (uint16_t, 64) \
+ T (_Float16, 64) \
+ T (int32_t, 64) \
+ T (uint32_t, 64) \
+ T (float, 64) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-2.c
new file mode 100644
index 00000000000..35e97012469
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-2.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 uint8_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 8) \
+ T (uint16_t, 8) \
+ T (_Float16, 8) \
+ T (int32_t, 8) \
+ T (uint32_t, 8) \
+ T (float, 8) \
+ T (int64_t, 8) \
+ T (uint64_t, 8) \
+ T (double, 8)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-4.c
new file mode 100644
index 00000000000..fb72b092b7c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-4.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX8 int8_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 8) \
+ T (uint8_t, 8) \
+ T (int16_t, 8) \
+ T (uint16_t, 8) \
+ T (_Float16, 8) \
+ T (int32_t, 8) \
+ T (uint32_t, 8) \
+ T (float, 8) \
+ T (int64_t, 8) \
+ T (uint64_t, 8) \
+ T (double, 8)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-5.c
new file mode 100644
index 00000000000..7b562bd94a9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-5.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX16 uint16_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 16) \
+ T (uint8_t, 16) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 16) \
+ T (uint32_t, 16) \
+ T (float, 16) \
+ T (int64_t, 16) \
+ T (uint64_t, 16) \
+ T (double, 16)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-6.c
new file mode 100644
index 00000000000..67ea0e005f1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-6.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX16 int16_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 16) \
+ T (uint8_t, 16) \
+ T (int16_t, 16) \
+ T (uint16_t, 16) \
+ T (_Float16, 16) \
+ T (int32_t, 16) \
+ T (uint32_t, 16) \
+ T (float, 16) \
+ T (int64_t, 16) \
+ T (uint64_t, 16) \
+ T (double, 16)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-7.c
new file mode 100644
index 00000000000..76f84850b2b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-7.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX32 uint32_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 32) \
+ T (uint8_t, 32) \
+ T (int16_t, 32) \
+ T (uint16_t, 32) \
+ T (_Float16, 32) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 32) \
+ T (uint64_t, 32) \
+ T (double, 32)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-8.c
new file mode 100644
index 00000000000..e6e49019fb1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-8.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX32 int32_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 32) \
+ T (uint8_t, 32) \
+ T (int16_t, 32) \
+ T (uint16_t, 32) \
+ T (_Float16, 32) \
+ T (int32_t, 32) \
+ T (uint32_t, 32) \
+ T (float, 32) \
+ T (int64_t, 32) \
+ T (uint64_t, 32) \
+ T (double, 32)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-9.c
new file mode 100644
index 00000000000..81eb9352598
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_32-9.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+#define INDEX64 uint64_t
+
+#define TEST_LOOP(DATA_TYPE, BITS) \
+ void __attribute__ ((noinline, noclone)) \
+ f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
+ INDEX##BITS *restrict indices) \
+ { \
+ for (int i = 0; i < 128; ++i) \
+ dest[indices[i]] = src[i] + 1; \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, 64) \
+ T (uint8_t, 64) \
+ T (int16_t, 64) \
+ T (uint16_t, 64) \
+ T (_Float16, 64) \
+ T (int32_t, 64) \
+ T (uint32_t, 64) \
+ T (float, 64) \
+ T (int64_t, 64) \
+ T (uint64_t, 64) \
+ T (double, 64)
+
+TEST_ALL (TEST_LOOP)
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 11 "vect" } } */
+/* { dg-final { scan-tree-dump " \.MASK_LEN_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-tree-dump-not " \.MASK_SCATTER_STORE" "vect" } } */
+/* { dg-final { scan-assembler-not {vluxei64\.v} } } */
+/* { dg-final { scan-assembler-not {vsuxei64\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-1.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-1.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-1.c
index 28c4bae01c3..343a3658396 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-10.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-10.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-10.c
index 2cd3e7245aa..76b0b075ba3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-10.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-2.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-2.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-2.c
index ee44f415e8b..7eb881989b3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-2.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-3.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-3.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-3.c
index 899b05f96ff..47e8ce3e186 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-3.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-4.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-4.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-4.c
index ff6d90ce404..5c51741e892 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-4.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-5.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-5.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-5.c
index 212bd2d9d24..cc0b2fe15c4 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-5.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-6.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-6.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-6.c
index 4b6b39df814..3408cbd88d6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-6.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-7.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-7.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-7.c
index 2415c69a3b0..f45c9bc6727 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-7.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-8.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-8.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-8.c
index 4c2fcb14428..64fe30548cb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-8.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-9.c
similarity index 95%
rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-9.c
rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-9.c
index 0f4f94cc800..bd1538db045 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_64-9.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -fdump-tree-vect-details" } */
#include <stdint-gcc.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-1.c
index 91edba70626..ec1e0204512 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-1.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "scatter_store-1.c"
+#include "scatter_store_64-1.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-10.c
index 40e34c698d2..d61a37af539 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-10.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "scatter_store-10.c"
+#include "scatter_store_64-10.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-2.c
index 721c6f6210b..c1c32008d15 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-2.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
/* { dg-additional-options "-mcmodel=medany" } */
-#include "scatter_store-2.c"
+#include "scatter_store_64-2.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-3.c
index 8d268a6d174..8234f84820a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-3.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "scatter_store-3.c"
+#include "scatter_store_64-3.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-4.c
index 3931a81cb17..b137e1d35cf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-4.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "scatter_store-4.c"
+#include "scatter_store_64-4.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-5.c
index ff306301457..1290f871765 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-5.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "scatter_store-5.c"
+#include "scatter_store_64-5.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-6.c
index a30c47da723..79b1ea73c8f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-6.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
-#include "scatter_store-6.c"
+#include "scatter_store_64-6.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-7.c
index 94ab40470bf..c204e7cdfcf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-7.c
@@ -5,7 +5,7 @@
compiles properly. */
/* { dg-additional-options "-mcmodel=medany" } */
-#include "scatter_store-7.c"
+#include "scatter_store_64-7.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-8.c
index 16c1e17d9be..1dafabafff7 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-8.c
@@ -5,7 +5,7 @@
compiles properly. */
/* { dg-additional-options "-mcmodel=medany" } */
-#include "scatter_store-8.c"
+#include "scatter_store_64-8.c"
#include <assert.h>
int
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-9.c
index a91b500b3c7..1b37cac71e1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-9.c
@@ -1,7 +1,7 @@
/* { dg-do run { target { riscv_v } } } */
/* { dg-additional-options "-mcmodel=medany" } */
-#include "scatter_store-9.c"
+#include "scatter_store_64-9.c"
#include <assert.h>
int
--
2.41.0
next prev parent reply other threads:[~2023-11-15 14:18 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-15 14:01 Robin Dapp
2023-11-15 14:17 ` 钟居哲 [this message]
2023-11-15 14:27 ` Robin Dapp
2023-11-15 14:29 ` 钟居哲
2023-11-15 20:30 ` Robin Dapp
2023-11-15 22:13 ` 钟居哲
2023-11-17 14:55 ` Robin Dapp
2023-11-17 15:07 ` 钟居哲
2023-11-17 15:13 ` Robin Dapp
2023-11-17 15:17 ` 钟居哲
2023-11-20 13:14 ` Robin Dapp
2023-11-20 13:20 ` juzhe.zhong
2023-11-15 14:19 ` 钟居哲
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