From: Thomas Preudhomme <thomas.preudhomme@foss.arm.com>
To: Kyrill Tkachov <kyrylo.tkachov@foss.arm.com>,
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>,
Richard Earnshaw <richard.earnshaw@arm.com>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH, GCC/ARM] Fix PR77904: callee-saved register trashed when clobbering sp
Date: Wed, 30 Nov 2016 10:42:00 -0000 [thread overview]
Message-ID: <7a70eca3-3442-2553-2434-08b5e00879a3@foss.arm.com> (raw)
In-Reply-To: <f3c35e7a-41d1-c2b8-120a-408ee91cb15a@foss.arm.com>
[-- Attachment #1: Type: text/plain, Size: 2261 bytes --]
Hi,
Is this ok to backport to gcc-5-branch and gcc-6-branch? Patch applies cleanly
(patches attached for reference).
2016-11-30 Thomas Preud'homme <thomas.preudhomme@arm.com>
Backport from mainline
2016-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
PR target/77904
* config/arm/arm.c (thumb1_compute_save_reg_mask): Mark frame pointer
in save register mask if it is needed.
gcc/testsuite/
PR target/77904
* gcc.target/arm/pr77904.c: New test.
Best regards,
Thomas
On 22/11/16 10:45, Thomas Preudhomme wrote:
> On 17/11/16 09:11, Kyrill Tkachov wrote:
>>
>> On 17/11/16 08:56, Thomas Preudhomme wrote:
>>> On 16/11/16 10:30, Kyrill Tkachov wrote:
>>>> Hi Thomas,
>>>>
>>>> On 03/11/16 16:52, Thomas Preudhomme wrote:
>>>>> Hi,
>>>>>
>>>>> When using a callee-saved register to save the frame pointer the Thumb-1
>>>>> prologue fails to save the callee-saved register before that. For ARM and
>>>>> Thumb-2 targets the frame pointer is handled as a special case but nothing is
>>>>> done for Thumb-1 targets. This patch adds the same logic for Thumb-1 targets.
>>>>>
>>>>> ChangeLog entries are as follow:
>>>>>
>>>>> *** gcc/ChangeLog ***
>>>>>
>>>>> 2016-11-02 Thomas Preud'homme <thomas.preudhomme@arm.com>
>>>>>
>>>>> PR target/77904
>>>>> * config/arm/arm.c (thumb1_compute_save_reg_mask): mark frame pointer
>>>>> in save register mask if it is needed.
>>>>>
>>>>
>>>> s/mark/Mark/
>>>>
>>>>>
>>>>> *** gcc/testsuite/ChangeLog ***
>>>>>
>>>>> 2016-11-02 Thomas Preud'homme <thomas.preudhomme@arm.com>
>>>>>
>>>>> PR target/77904
>>>>> * gcc.target/arm/pr77904.c: New test.
>>>>>
>>>>>
>>>>> Testing: Testsuite shows no regression when run with arm-none-eabi GCC
>>>>> cross-compiler for Cortex-M0 target.
>>>>>
>>>>> Is this ok for trunk?
>>>>>
>>>>
>>>> I'd ask for a bootstrap, but this code is Thumb-1 only so it wouldn't affect
>>>> anything.
>>>
>>> I can bootstrap for armv4t with --with-mode=thumb which would at least
>>> exercise the path. I'll try such a bootstrap on qemu.
>>>
>>
>> If you can get it to work, then yes please.
>
> Bootstrap came back clean so I've committed the patch (r242693). Thanks!
>
> Best regards,
>
> Thomas
[-- Attachment #2: fix_pr77904_gcc5.patch --]
[-- Type: text/x-patch, Size: 1783 bytes --]
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index c01a3c878968f6e6f07358b0686e4a59e34f56b7..62fd5c557e4a356bc2bf0141d35b959dfb859842 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -19361,6 +19361,10 @@ thumb1_compute_save_reg_mask (void)
if (df_regs_ever_live_p (reg) && callee_saved_reg_p (reg))
mask |= 1 << reg;
+ /* Handle the frame pointer as a special case. */
+ if (frame_pointer_needed)
+ mask |= 1 << HARD_FRAME_POINTER_REGNUM;
+
if (flag_pic
&& !TARGET_SINGLE_PIC_BASE
&& arm_pic_register != INVALID_REGNUM
diff --git a/gcc/testsuite/gcc.target/arm/pr77904.c b/gcc/testsuite/gcc.target/arm/pr77904.c
new file mode 100644
index 0000000000000000000000000000000000000000..76728c07e73350ce44160cabff3dd2fa7a6ef021
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr77904.c
@@ -0,0 +1,45 @@
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+
+__attribute__ ((noinline, noclone)) void
+clobber_sp (void)
+{
+ __asm volatile ("" : : : "sp");
+}
+
+int
+main (void)
+{
+ int ret;
+
+ __asm volatile ("mov\tr4, #0xf4\n\t"
+ "mov\tr5, #0xf5\n\t"
+ "mov\tr6, #0xf6\n\t"
+ "mov\tr7, #0xf7\n\t"
+ "mov\tr0, #0xf8\n\t"
+ "mov\tr8, r0\n\t"
+ "mov\tr0, #0xfa\n\t"
+ "mov\tr10, r0"
+ : : : "r0", "r4", "r5", "r6", "r7", "r8", "r10");
+ clobber_sp ();
+
+ __asm volatile ("cmp\tr4, #0xf4\n\t"
+ "bne\tfail\n\t"
+ "cmp\tr5, #0xf5\n\t"
+ "bne\tfail\n\t"
+ "cmp\tr6, #0xf6\n\t"
+ "bne\tfail\n\t"
+ "cmp\tr7, #0xf7\n\t"
+ "bne\tfail\n\t"
+ "mov\tr0, r8\n\t"
+ "cmp\tr0, #0xf8\n\t"
+ "bne\tfail\n\t"
+ "mov\tr0, r10\n\t"
+ "cmp\tr0, #0xfa\n\t"
+ "bne\tfail\n\t"
+ "mov\t%0, #1\n"
+ "fail:\n\t"
+ "sub\tr0, #1"
+ : "=r" (ret) : :);
+ return ret;
+}
[-- Attachment #3: fix_pr77904_gcc6.patch --]
[-- Type: text/x-patch, Size: 1783 bytes --]
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 83cb13d1195beb19d6301f5c83a7eb544a91d877..ae479a43fe8514f2eacb7d56f89916b48f720768 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -19390,6 +19390,10 @@ thumb1_compute_save_reg_mask (void)
if (df_regs_ever_live_p (reg) && callee_saved_reg_p (reg))
mask |= 1 << reg;
+ /* Handle the frame pointer as a special case. */
+ if (frame_pointer_needed)
+ mask |= 1 << HARD_FRAME_POINTER_REGNUM;
+
if (flag_pic
&& !TARGET_SINGLE_PIC_BASE
&& arm_pic_register != INVALID_REGNUM
diff --git a/gcc/testsuite/gcc.target/arm/pr77904.c b/gcc/testsuite/gcc.target/arm/pr77904.c
new file mode 100644
index 0000000000000000000000000000000000000000..76728c07e73350ce44160cabff3dd2fa7a6ef021
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr77904.c
@@ -0,0 +1,45 @@
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+
+__attribute__ ((noinline, noclone)) void
+clobber_sp (void)
+{
+ __asm volatile ("" : : : "sp");
+}
+
+int
+main (void)
+{
+ int ret;
+
+ __asm volatile ("mov\tr4, #0xf4\n\t"
+ "mov\tr5, #0xf5\n\t"
+ "mov\tr6, #0xf6\n\t"
+ "mov\tr7, #0xf7\n\t"
+ "mov\tr0, #0xf8\n\t"
+ "mov\tr8, r0\n\t"
+ "mov\tr0, #0xfa\n\t"
+ "mov\tr10, r0"
+ : : : "r0", "r4", "r5", "r6", "r7", "r8", "r10");
+ clobber_sp ();
+
+ __asm volatile ("cmp\tr4, #0xf4\n\t"
+ "bne\tfail\n\t"
+ "cmp\tr5, #0xf5\n\t"
+ "bne\tfail\n\t"
+ "cmp\tr6, #0xf6\n\t"
+ "bne\tfail\n\t"
+ "cmp\tr7, #0xf7\n\t"
+ "bne\tfail\n\t"
+ "mov\tr0, r8\n\t"
+ "cmp\tr0, #0xf8\n\t"
+ "bne\tfail\n\t"
+ "mov\tr0, r10\n\t"
+ "cmp\tr0, #0xfa\n\t"
+ "bne\tfail\n\t"
+ "mov\t%0, #1\n"
+ "fail:\n\t"
+ "sub\tr0, #1"
+ : "=r" (ret) : :);
+ return ret;
+}
next prev parent reply other threads:[~2016-11-30 10:42 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-03 16:52 Thomas Preudhomme
2016-11-08 13:37 ` [PATCH, GCC/ARM, ping] " Thomas Preudhomme
2016-11-22 11:52 ` [arm-embedded] " Thomas Preudhomme
2016-11-16 10:30 ` [PATCH, GCC/ARM] " Kyrill Tkachov
2016-11-17 8:56 ` Thomas Preudhomme
2016-11-17 9:11 ` Kyrill Tkachov
2016-11-22 10:45 ` Thomas Preudhomme
2016-11-30 10:42 ` Thomas Preudhomme [this message]
2016-11-30 10:44 ` Thomas Preudhomme
2016-12-06 11:38 ` [PATCH, GCC/ARM, gcc-5/6-branch, ping] " Thomas Preudhomme
2016-12-12 10:44 ` Thomas Preudhomme
2016-12-12 10:46 ` Kyrill Tkachov
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