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From: Peter Bergner <bergner@linux.ibm.com>
To: acsawdey@linux.ibm.com, gcc-patches@gcc.gnu.org
Cc: segher@kernel.crashing.org, wschmidt@linux.ibm.com
Subject: Re: [PATCH,rs6000] Make MMA builtins use opaque modes
Date: Tue, 17 Nov 2020 12:41:58 -0600	[thread overview]
Message-ID: <7a81891c-cad1-b83a-bd8c-0e132d7a607f@linux.ibm.com> (raw)
In-Reply-To: <20201117174804.2218917-1-acsawdey@linux.ibm.com>

On 11/17/20 11:48 AM, acsawdey@linux.ibm.com wrote:
> -;; The MMA patterns use the multi-register PXImode and POImode partial
> +;; The MMA patterns use the multi-register XOmode and OOmode partial
>  ;; integer modes to implement the target specific __vector_quad and

XOmode and OOmode are not partial integer modes, so change to opaque mode.


> +;; Return 1 if this operand is valid for an MMA disassemble insn.
> +(define_predicate "mma_disassemble_output_operand"
> +  (match_code "reg,subreg,mem")
> +{
> +  if (REG_P (op) && !vsx_register_operand (op, mode))
> +    return false;
> +  return true;
> +})

Do we really want to accept subregs here?  If so, why are they not also required
to be vsx_register_operand()?


> -	  if ((attr & RS6000_BTC_QUAD) == 0)
> +	  if ( !( d->code == MMA_BUILTIN_DISASSEMBLE_ACC_INTERNAL
> +		  || d->code == MMA_BUILTIN_DISASSEMBLE_PAIR_INTERNAL)
> +	       && ((attr & RS6000_BTC_QUAD) == 0))

No white space after the '('.



> -      if (icode == CODE_FOR_nothing)
> +      /* This is a disassemble pair/acc function. */
> +      if ( d->code == MMA_BUILTIN_DISASSEMBLE_ACC
> +	   || d->code == MMA_BUILTIN_DISASSEMBLE_PAIR)

Ditto.



> +  /* The __vector_pair and __vector_quad modes are multi-register
> +     modes, so if have to load or store the registers, we have to be
> +     careful to properly swap them if we're in little endian mode

s/so if have to/so if we have to/


> -	  /* We are writing an accumulator register, so we have to
> -	     prime it after we've written it.  */
> -	  emit_insn (gen_mma_xxmtacc (dst, dst));
> +	  if ( GET_MODE (src) == XOmode )

White space again.


>        /* Move register range backwards, if we might have destructive
>  	 overlap.  */
>        int i;
> -      for (i = nregs - 1; i >= 0; i--)
> -	emit_insn (gen_rtx_SET (simplify_gen_subreg (reg_mode, dst, mode,
> -						     i * reg_mode_size),
> -				simplify_gen_subreg (reg_mode, src, mode,
> -						     i * reg_mode_size)));
> +      /* XO/OO are opaque so cannot use subregs. */
> +      if ( mode == OOmode || mode == XOmode )

Ditto.


> +	  /* XO/OO are opaque so cannot use subregs. */
> +	  if ( mode == OOmode || mode == XOmode )

Ditto.


Peter

  reply	other threads:[~2020-11-17 18:42 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-17 17:48 acsawdey
2020-11-17 18:41 ` Peter Bergner [this message]
2020-11-17 23:01   ` Segher Boessenkool
2020-11-17 23:24     ` Peter Bergner
2020-11-17 22:42 ` Segher Boessenkool
2020-11-19 18:58   ` [PATCH,rs6000] Make MMA builtins use opaque modes [v2] acsawdey
2020-11-19 20:08     ` Peter Bergner
2020-11-20  1:02     ` Aaron Sawdey
2020-11-20 19:10     ` Segher Boessenkool

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