Re: [RFA] [PR target/108248] [RISC-V] Break down some bitmanip insn types

[Robin Dapp <rdapp.gcc@gmail.com>]

> ../../gcc/config/riscv/generic.md:28:1: unknown value `smin' for attribute `type'
> make[3]: *** [Makefile:2528: s-attrtab] Error 1
> 

From 582c428258ce17ffac8ef1b96b4072f3d510480f Mon Sep 17 00:00:00 2001
From: Robin Dapp <rdapp@ventanamicro.com>
Date: Fri, 21 Apr 2023 09:38:06 +0200
Subject: [PATCH] riscv: Fix <bitmanip_insn> fallout.

The adjusted generic.md uses standard names instead of the types defined
in the <bitmanip_insn> iterator (that match instruction names).  Change this.

gcc/ChangeLog:

	* config/riscv/generic.md: Change standard names to insn names.
---
 gcc/config/riscv/generic.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/generic.md b/gcc/config/riscv/generic.md
index db4fabbbd92..2c3376628c3 100644
--- a/gcc/config/riscv/generic.md
+++ b/gcc/config/riscv/generic.md
@@ -27,7 +27,7 @@ (define_cpu_unit "fdivsqrt" "pipe0")
 
 (define_insn_reservation "generic_alu" 1
   (and (eq_attr "tune" "generic")
-       (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,move,bitmanip,smin,smax,umin,umax,clz,ctz,cpop"))
+       (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,move,bitmanip,min,max,minu,maxu,clz,ctz,cpop"))
   "alu")
 
 (define_insn_reservation "generic_load" 3
-- 
2.40.0