From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 67C093858C42 for ; Fri, 26 Apr 2024 09:20:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 67C093858C42 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 67C093858C42 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1714123246; cv=none; b=YBedz7iaKtmHocKxXn2ib4ZrqPLHsBGPPeo4BBV6bDQIWMtNgXrQLDOyPiQ3poYd6Rl+l4034DxdQb7WDXPoYNJrP2eQpTqndywsIrNXmKGsJnSX4u6jqSOdgIjwpACiPSDbxhn0wABglQj/NntizftuAcuXrLApGifahe0RK1E= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1714123246; c=relaxed/simple; bh=Uhuxe71aun0Tj6+tvUiyXT9nnm3kIY/pOr62ldninw8=; h=Message-ID:Date:MIME-Version:Subject:To:From; b=YwFISNsSnbcaArEK72w/zUaj7BtJObRQzc2YuSXJwR2p53wTy6tld3gdJt22VG2Uzuo7ojT3vNpISYh1xvEL6FFWLGqr36kFFddzrgLHwUY6JGOKMMVybEFPaIYtSkIrbwNIEyQh6u8H0nxKPL53gXpl7vp//JIZ4c+NriYk72w= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1E4982F4; Fri, 26 Apr 2024 02:21:13 -0700 (PDT) Received: from [10.2.78.64] (e120077-lin.cambridge.arm.com [10.2.78.64]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8E2E23F64C; Fri, 26 Apr 2024 02:20:44 -0700 (PDT) Message-ID: <7d7ad48d-6244-43e9-be31-570b688f805b@arm.com> Date: Fri, 26 Apr 2024 10:20:43 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH][GCC] aarch64: Fix SCHEDULER_IDENT for Cortex-A510 To: Richard Ball , "gcc-patches@gcc.gnu.org" References: From: "Richard Earnshaw (lists)" Content-Language: en-GB In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-3489.3 required=5.0 tests=BAYES_00,BODY_8BITS,KAM_ASCII_DIVIDERS,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,KAM_NUMSUBJECT,KAM_SHORT,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 25/04/2024 15:59, Richard Ball wrote: > Hi Richard, >=20 > I committed this combined patch (with Cortex-A520) for trunk https://gc= c.gnu.org/git/?p=3Dgcc.git;a=3Dcommit;h=3Dcab53aae43cf94171b01320c08302e4= 7a5daa391 >=20 > Am I ok to commit just the Cortex-A510 half into gcc-12 and gcc-13. Yes, if that's the correct thing to do there. R. >=20 > Thanks, > Richard Ball > -----------------------------------------------------------------------= -------------------------------------------------------------------------= -------------------------------------------------------------------------= -------------------------------------------------------------------------= -------------------------------------------------------------------------= -------------------------------------------------------------------------= -------------------------------------------------------------------------= -------------------------------------------------------------------------= -------------------------------------------------------------------------= -------------------------------------------------------------------------= -------------------------------------------------------------------------= -------------------------------------------------------------------------= -------------------------------------------------------------------------= ------------------------------------------- > *From:* Richard Ball > *Sent:* 12 March 2024 14:08 > *To:* gcc-patches@gcc.gnu.org ; Richard Earnsh= aw ; Richard Sandiford ; Marcus Shawcroft > *Subject:* [PATCH][GCC] aarch64: Fix SCHEDULER_IDENT for Cortex-A510 > =C2=A0 > The SCHEDULER_IDENT for this CPU was incorrectly > set to cortexa55, which is incorrect. This can cause > sub-optimal asm to be generated. >=20 > Ok for trunk? >=20 > Can I also backport this to gcc-12 and gcc-13? >=20 > gcc/ChangeLog: > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 PR target/114272 > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * config/aarch64/aarch64-cor= es.def (AARCH64_CORE): > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Change SCHEDULER_IDENT from = cortexa55 to cortexa53 > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 for Cortex-A510.