From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id CE7333858D32; Mon, 5 Sep 2022 06:25:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org CE7333858D32 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2855IG9I025590; Mon, 5 Sep 2022 06:25:34 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : references : date : in-reply-to : message-id : mime-version : content-type; s=pp1; bh=L7sc0NI8kcT7Dzu58MWHcGe+iMR1SZ5S/NMj20Y5lNw=; b=eTRRRHL0X6j4uzAUDNIYFvKqXDQDZggcdB7XvL4fLTSdHLcdIT69niReeZikxtcumHHK XLjjgih6nUSqw10XCbxE9v1pIBfZpnHq1/yDsB1SbXJNRfKVgnYXQp1ctRsynpB7OB9o hIZNG81AbTh9lAZs0JEBigermACeXV+ebLYXc6JDNlS4EeCWvgdMvhRhlQSFTshYONRT 1G+zaiT1hBGbn29UnFV6rZDiMpzSOxGBivYmdeCUZXTvwtgVp0gV9boBspDQ7Wi7F3j3 3fLZE+0tMBp9IINGkOHymAdjxEFvgmW4+5yXNIdRgogupqIcl0EgF0C2Gx4PanQ+pT+5 0w== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3jdaunhfn5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 05 Sep 2022 06:25:34 +0000 Received: from m0098410.ppops.net (m0098410.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 2855vo5m025442; Mon, 5 Sep 2022 06:25:33 GMT Received: from ppma04wdc.us.ibm.com (1a.90.2fa9.ip4.static.sl-reverse.com [169.47.144.26]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3jdaunhfme-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 05 Sep 2022 06:25:33 +0000 Received: from pps.filterd (ppma04wdc.us.ibm.com [127.0.0.1]) by ppma04wdc.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 2856LVFB020637; Mon, 5 Sep 2022 06:25:32 GMT Received: from b01cxnp22033.gho.pok.ibm.com (b01cxnp22033.gho.pok.ibm.com [9.57.198.23]) by ppma04wdc.us.ibm.com with ESMTP id 3jbxj9bapq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 05 Sep 2022 06:25:32 +0000 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 2856PWgr37617990 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 5 Sep 2022 06:25:32 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3466F112062; Mon, 5 Sep 2022 06:25:32 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E33E9112065; Mon, 5 Sep 2022 06:25:31 +0000 (GMT) Received: from pike (unknown [9.5.12.127]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTPS; Mon, 5 Sep 2022 06:25:31 +0000 (GMT) From: Jiufu Guo To: Segher Boessenkool Cc: gcc-patches@gcc.gnu.org, dje.gcc@gmail.com, linkw@gcc.gnu.org, meissner@linux.ibm.com Subject: Re: [PATCH 1/2] Using pli(paddi) and rotate to build 64bit constants References: <20220901032400.23692-1-guojiufu@linux.ibm.com> <20220901215233.GJ25951@gate.crashing.org> <7eedwuw9gq.fsf@pike.rch.stglabs.ibm.com> <20220902161236.GQ25951@gate.crashing.org> Date: Mon, 05 Sep 2022 14:25:29 +0800 In-Reply-To: <20220902161236.GQ25951@gate.crashing.org> (Segher Boessenkool's message of "Fri, 2 Sep 2022 11:12:36 -0500") Message-ID: <7e5yi2uyli.fsf@pike.rch.stglabs.ibm.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-GCONF: 00 X-Proofpoint-GUID: cDO4WgtNToYX-KElMqjOWJA24IgnB1X6 X-Proofpoint-ORIG-GUID: -WE63aAbBLz3Uq2cLeAn-9ufDEgVqZXB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-09-05_04,2022-09-05_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 priorityscore=1501 mlxlogscore=999 impostorscore=0 adultscore=0 clxscore=1015 bulkscore=0 suspectscore=0 malwarescore=0 mlxscore=0 spamscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2207270000 definitions=main-2209050029 X-Spam-Status: No, score=-6.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi, Segher Boessenkool writes: > Hi! > > On Fri, Sep 02, 2022 at 02:56:21PM +0800, Jiufu Guo wrote: >> >> + /* pli 9,high32 + sldi 9,32 + paddi 9,9,low32. */ >> >> + else >> >> + { >> > >> > The comment goes here, in the block it refers to. Comments for a block >> > are the first thing *in* the block. >> OK, great! I like the format you sugguested here :-) > > It's the normal GCC style, not my invention :-) > >> >> + emit_move_insn (copy_rtx (dest), GEN_INT ((ud4 << 16) | ud3)); >> >> + >> >> + emit_move_insn (copy_rtx (dest), >> >> + gen_rtx_ASHIFT (DImode, copy_rtx (dest), >> >> + GEN_INT (32))); >> >> + >> >> + bool can_use_paddi = REGNO (dest) != FIRST_GPR_REGNO; >> > >> > There should be a test that we so the right thing (or *a* right thing, >> > anyway; a working thing; but hopefully a reasonably fast thing) for >> > !can_use_paddi. >> To catch this test point, we need let the splitter run after RA, >> and register 0 happen to be the dest of an assignment. > > Or force the testcase to use r0 some other way. Well, "forcing" cannot > be done, but we can probably encourage it (via a local register asm for > example, or by tying the var to the output of an asm that is hard reg 0, > or perhaps there are other ways as well :-) ) Specify register is very helpful here! Both below two cases could help register 0 to be selected for a variable. Great! Thanks! code1 ------- void __attribute__ ((noinline)) foo (unsigned long long *a) { register long long d asm("r0") = 0x1245abcef9240dec; long long n; asm("cntlzd %0, %1" : "=r"(n) : "r"(d)); *a = n; } code2 ----------- register long long d asm ("r0"); void __attribute__ ((noinline)) foo () { d = 0x2351847027482577ULL; } > >> I will add this test case in patch. >> Is this ok? Any sugguestions? > > Sounds useful yes. Maybe describe the expected output in words as well > (in the testcase, not in email)? OK. Will update the patch accordingly. > >> >> +/* 3 insns for each constant: pli+sldi+paddi or pli+pli+rldimi. >> >> + And 3 additional insns: std+std+blr: 9 insns totally. */ >> >> +/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 9 } } */ >> > >> > Also test the expected insns separately please? The std's (just with >> > \mstd so it will catch all variations as well), the blr, the pli's and >> > the rldimi etc.? >> The reason of using "(?n)^\s+[a-z]" is to keep this test case pass no >> matter the splitter running before or after RA. > > Ah. Some short comment in the testcase please? Thanks. We can check individual instructions to check better asm pli+pli+rldimi is generated, since the splitter could run in split1 pass. BR, Jeff(Jiufu) > > Thanks again, > > > Segher