From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 66DE4385829B; Wed, 9 Nov 2022 03:18:12 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 66DE4385829B Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2A92j5D2025179; Wed, 9 Nov 2022 03:18:12 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : references : date : in-reply-to : message-id : content-type : mime-version; s=pp1; bh=9qTAEPQS+QNA7rD+OyPfcubSM1YIY196u1Z6H+S4EhE=; b=pnXVOMMzT6p+9BYu7YWYHR+D5w3cYnNkAyhtT3PuAyKD+VRziu+W/MSe4FDZ2WMZEBwP YaKvsftPM1Ac1fHDrTKjqAA0JzriAgVYH3vWRjhgD9kGpjdwaNG4J/JsCZljhBdMV+qE 4x1gkr2ATBwUjbqxTnNXN3A4Rz1OLZMv+2SEi9hCtHNbP0TtDjt6jz7CIoHmfpRRSw/6 bioEnqoe6FWTcYTSaru1bOvNwg770TPp9vDJnsRsitjjDlcyaOtkyRjJ84htNo13dJWg BpFWGCNVT7b27cWi6KVlQDxG6Py173i24rsgr/7E/VKcu4FZ3U6wMF06I9+X0+97Fnpw Pg== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3kr3pv0rsr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 09 Nov 2022 03:18:11 +0000 Received: from m0098421.ppops.net (m0098421.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 2A93G2sx020233; Wed, 9 Nov 2022 03:18:11 GMT Received: from ppma04wdc.us.ibm.com (1a.90.2fa9.ip4.static.sl-reverse.com [169.47.144.26]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3kr3pv0rs9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 09 Nov 2022 03:18:11 +0000 Received: from pps.filterd (ppma04wdc.us.ibm.com [127.0.0.1]) by ppma04wdc.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 2A936XrG024003; Wed, 9 Nov 2022 03:18:10 GMT Received: from b01cxnp23032.gho.pok.ibm.com (b01cxnp23032.gho.pok.ibm.com [9.57.198.27]) by ppma04wdc.us.ibm.com with ESMTP id 3kngptu3r8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 09 Nov 2022 03:18:10 +0000 Received: from smtpav02.wdc07v.mail.ibm.com ([9.208.128.114]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 2A93I9tM66978114 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 9 Nov 2022 03:18:10 GMT Received: from smtpav02.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AD3E05809B; Wed, 9 Nov 2022 03:18:08 +0000 (GMT) Received: from smtpav02.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4FD3D5806E; Wed, 9 Nov 2022 03:18:08 +0000 (GMT) Received: from pike (unknown [9.5.12.127]) by smtpav02.wdc07v.mail.ibm.com (Postfix) with ESMTPS; Wed, 9 Nov 2022 03:18:08 +0000 (GMT) From: Jiufu Guo To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org Subject: Ping: [PATCH] rs6000: Enable const_anchor for 'addi' References: <20221014031748.55813-1-guojiufu@linux.ibm.com> Date: Wed, 09 Nov 2022 11:18:05 +0800 In-Reply-To: <20221014031748.55813-1-guojiufu@linux.ibm.com> (Jiufu Guo's message of "Fri, 14 Oct 2022 11:17:48 +0800") Message-ID: <7ebkpgvms2.fsf@pike.rch.stglabs.ibm.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) Content-Type: text/plain X-TM-AS-GCONF: 00 X-Proofpoint-GUID: DeiSaQ_NMj16EvmtGYTa868oLChKnQ_7 X-Proofpoint-ORIG-GUID: _R7GyVv61MYXTD8AOqvRYe_buc5voxn_ X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-07_11,2022-11-08_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxscore=0 impostorscore=0 adultscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=999 suspectscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211090020 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi, I would like to have a ping for this patch: https://gcc.gnu.org/pipermail/gcc-patches/2022-October/603530.html BR, Jeff(Jiufu) Jiufu Guo writes: > Hi, > > There is a functionality as const_anchor in cse.cc. This const_anchor > supports to generate new constants through adding small gap/offsets to > existing constant. For example: > > void __attribute__ ((noinline)) foo (long long *a) > { > *a++ = 0x2351847027482577LL; > *a++ = 0x2351847027482578LL; > } > The second constant (0x2351847027482578LL) can be compated by adding '1' > to the first constant (0x2351847027482577LL). > This is profitable if more than one instructions are need to build the > second constant. > > * For rs6000, we can enable this functionality, as the instruction > 'addi' is just for this when gap is smaller than 0x8000. > > * Besides enabling TARGET_CONST_ANCHOR on rs6000, this patch also fixed > one issue. The issue is: > "gcc_assert (SCALAR_INT_MODE_P (mode))" is an requirement for function > "try_const_anchors". e.g. it may not need to check const_anchor for > {[%1:DI]=0;} which is in BLK mode. And "SCALAR_INT_MODE_P (mode)" is > checked when invoking insert_const_anchors. > So, this patch also adds this checking before calling try_const_anchors. > > * One potential side effect of this patch: > Comparing with > "r101=0x2351847027482577LL > ... > r201=0x2351847027482578LL" > The new r201 will be "r201=r101+1", and then r101 will live longer, > and would increase pressure when allocating registers. After r201 is changed to "r201=r101+1", r101 will live longer, and r201 depends on r101. This would be the major concern for this patch, I guess. > But I feel, this would be acceptable for this const_anchor feature. > > * With this patch, I checked the performance change on SPEC2017, while, > and the performance is not aggressive, since this functionality is not > hit on any hot path. There are runtime wavings/noise(e.g. on > povray_r/xalancbmk_r/xz_r), that are not caused by the patch. > > With this patch, I also checked the changes in object files (from > GCC bootstrap and SPEC), the significant changes are the improvement > that: "addi" vs. "2 or more insns: lis+or.."; it also exposes some > other optimizations opportunities: like combine/jump2. While the > code to store/load one more register is also occurring in few cases, > but it does not impact overall performance. > > * To refine this patch, some history discussions are referenced: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=33699 > https://gcc.gnu.org/pipermail/gcc-patches/2009-April/260421.html > https://gcc.gnu.org/pipermail/gcc-patches/2021-March/566744.html > > > Bootstrap and regtest pass on ppc64 and ppc64le for this patch. > Is this ok for trunk? > > > BR, > Jeff (Jiufu) > > gcc/ChangeLog: > > * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define. > * cse.cc (cse_insn): Add guard condition. > > gcc/testsuite/ChangeLog: > > * gcc.target/powerpc/const_anchors.c: New test. > * gcc.target/powerpc/try_const_anchors_ice.c: New test. > > --- > gcc/config/rs6000/rs6000.cc | 4 ++++ > gcc/cse.cc | 3 ++- > .../gcc.target/powerpc/const_anchors.c | 20 +++++++++++++++++++ > .../powerpc/try_const_anchors_ice.c | 16 +++++++++++++++ > 4 files changed, 42 insertions(+), 1 deletion(-) > create mode 100644 gcc/testsuite/gcc.target/powerpc/const_anchors.c > create mode 100644 gcc/testsuite/gcc.target/powerpc/try_const_anchors_ice.c > > diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc > index d2743f7bce6..80cded6dec1 100644 > --- a/gcc/config/rs6000/rs6000.cc > +++ b/gcc/config/rs6000/rs6000.cc > @@ -1760,6 +1760,10 @@ static const struct attribute_spec rs6000_attribute_table[] = > > #undef TARGET_UPDATE_IPA_FN_TARGET_INFO > #define TARGET_UPDATE_IPA_FN_TARGET_INFO rs6000_update_ipa_fn_target_info > + > +#undef TARGET_CONST_ANCHOR > +#define TARGET_CONST_ANCHOR 0x8000 > + > > > /* Processor table. */ > diff --git a/gcc/cse.cc b/gcc/cse.cc > index b13afd4ba72..56542b91c1e 100644 > --- a/gcc/cse.cc > +++ b/gcc/cse.cc > @@ -5005,7 +5005,8 @@ cse_insn (rtx_insn *insn) > if (targetm.const_anchor > && !src_related > && src_const > - && GET_CODE (src_const) == CONST_INT) > + && GET_CODE (src_const) == CONST_INT > + && SCALAR_INT_MODE_P (mode)) > { > src_related = try_const_anchors (src_const, mode); > src_related_is_const_anchor = src_related != NULL_RTX; > diff --git a/gcc/testsuite/gcc.target/powerpc/const_anchors.c b/gcc/testsuite/gcc.target/powerpc/const_anchors.c > new file mode 100644 > index 00000000000..39958ff9765 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/const_anchors.c > @@ -0,0 +1,20 @@ > +/* { dg-do compile { target has_arch_ppc64 } } */ > +/* { dg-options "-O2" } */ > + > +#define C1 0x2351847027482577ULL > +#define C2 0x2351847027482578ULL > + > +void __attribute__ ((noinline)) foo (long long *a) > +{ > + *a++ = C1; > + *a++ = C2; > +} > + > +void __attribute__ ((noinline)) foo1 (long long *a, long long b) > +{ > + *a++ = C1; > + if (b) > + *a++ = C2; > +} > + > +/* { dg-final { scan-assembler-times {\maddi\M} 2 } } */ > diff --git a/gcc/testsuite/gcc.target/powerpc/try_const_anchors_ice.c b/gcc/testsuite/gcc.target/powerpc/try_const_anchors_ice.c > new file mode 100644 > index 00000000000..4c8a892e803 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/try_const_anchors_ice.c > @@ -0,0 +1,16 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2" } */ > + > +/* __builtin_stack_restore could generates {[%1:DI]=0;} in BLK mode, > + it could case ICE in try_const_anchors which only supports SCALAR_INT. */ > + > +long > +foo (const int val) > +{ > + if (val == (0)) > + return 0; > + void *p = __builtin_stack_save (); > + char c = val; > + __builtin_stack_restore (p); > + return c; > +}