From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id E319038532E0; Fri, 25 Nov 2022 13:31:53 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E319038532E0 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2APD1UbB025795; Fri, 25 Nov 2022 13:31:53 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : references : date : in-reply-to : message-id : mime-version : content-type; s=pp1; bh=upilazo+EYkrqWNomkdlUQKuNPJANxhFjJurpQGlYhE=; b=JRvZNx4wDHid5w3sts+z8Fvhv51O09NOAYc5UsSbiDE90bZj2ua+DeqlGuZkPkKzo4/J O6qj3qH35gAGJl0P426innoXKyMctNZfY51aS2XmCXf4XuUpLdmCnRl9uFYeJQ5uQCqm Ah3sC2bRO6RtwcTWos4DLx87IKXAAhIqYlVnuFXniVIA9No8i2FedU2NjWh5IMktZvQR YjwCnMauiZ22i5G41giQMK1nVCXHsIQ2st/tIvz2mLwfGGoSN+G3UqWQAT0jVUULH1BX FXmTdHarWX9Dvwm3g7zb03XrZdlMxNIB5McZ867AfQOSp2Ig3QilIrgVIizXcwxlVFKE SA== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3m2x7h8t46-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 25 Nov 2022 13:31:53 +0000 Received: from m0098417.ppops.net (m0098417.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 2APD2EqX027644; Fri, 25 Nov 2022 13:31:52 GMT Received: from ppma02dal.us.ibm.com (a.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.10]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3m2x7h8t3v-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 25 Nov 2022 13:31:52 +0000 Received: from pps.filterd (ppma02dal.us.ibm.com [127.0.0.1]) by ppma02dal.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 2APDLm0f009067; Fri, 25 Nov 2022 13:31:51 GMT Received: from b03cxnp08025.gho.boulder.ibm.com (b03cxnp08025.gho.boulder.ibm.com [9.17.130.17]) by ppma02dal.us.ibm.com with ESMTP id 3kxpsb1jut-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 25 Nov 2022 13:31:51 +0000 Received: from smtpav04.dal12v.mail.ibm.com ([9.208.128.131]) by b03cxnp08025.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 2APDVlbX40436368 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 25 Nov 2022 13:31:48 GMT Received: from smtpav04.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 614E65804E; Fri, 25 Nov 2022 13:31:50 +0000 (GMT) Received: from smtpav04.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 283A458056; Fri, 25 Nov 2022 13:31:50 +0000 (GMT) Received: from pike (unknown [9.5.12.127]) by smtpav04.dal12v.mail.ibm.com (Postfix) with ESMTPS; Fri, 25 Nov 2022 13:31:50 +0000 (GMT) From: Jiufu Guo To: Jiufu Guo via Gcc-patches Cc: "Kewen.Lin" , segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org Subject: Re: [PATCH]rs6000: Load high and low part of 64bit constant independently References: <20220915083052.74903-1-guojiufu@linux.ibm.com> <7b482d49-3928-552c-ccf5-d391684b7f2b@linux.ibm.com> <7ev8n3p3u6.fsf@pike.rch.stglabs.ibm.com> Date: Fri, 25 Nov 2022 21:31:47 +0800 In-Reply-To: <7ev8n3p3u6.fsf@pike.rch.stglabs.ibm.com> (Jiufu Guo via Gcc-patches's message of "Fri, 25 Nov 2022 21:21:21 +0800") Message-ID: <7er0xrp3cs.fsf@pike.rch.stglabs.ibm.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-GCONF: 00 X-Proofpoint-GUID: T9xM3GVLMkw9ZRInGSSvjtMAfCTmmAr3 X-Proofpoint-ORIG-GUID: 8fwE4gMqxtbbWDLa82BtwSywvxlV1buK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-25_04,2022-11-25_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 bulkscore=0 malwarescore=0 mlxlogscore=922 suspectscore=0 adultscore=0 impostorscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211250098 X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,KAM_SHORT,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Jiufu Guo via Gcc-patches writes: > Hi Kewen, > > Thanks for your review on this patch! > > "Kewen.Lin" writes: > >> Hi Jeff, >> >> Sorry for the late review. >> >> on 2022/9/15 16:30, Jiufu Guo wrote: >>> Hi, >>> >>> For a complicate 64bit constant, blow is one instruction-sequence to >>> build: >>> lis 9,0x800a >>> ori 9,9,0xabcd >>> sldi 9,9,32 >>> oris 9,9,0xc167 >>> ori 9,9,0xfa16 >>> >>> while we can also use below sequence to build: >>> lis 9,0xc167 >>> lis 10,0x800a >>> ori 9,9,0xfa16 >>> ori 10,10,0xabcd >>> rldimi 9,10,32,0 >>> This sequence is using 2 registers to build high and low part firstly, >>> and then merge them. >>> In parallel aspect, this sequence would be faster. (Ofcause, using 1 more >>> register with potential register pressure). >>> >>> Bootstrap and regtest pass on ppc64le. >>> Is this ok for trunk? >>> >>> >>> BR, >>> Jeff(Jiufu) >>> >>> >>> gcc/ChangeLog: >>> >>> * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Update 64bit >>> constant build. >>> >>> gcc/testsuite/ChangeLog: >>> >>> * gcc.target/powerpc/parall_5insn_const.c: New test. >>> >>> --- cut... > @@ -0,1 +1,27 @@ > +/* { dg-do run } */ > +/* { dg-options "-O2 -mdejagnu-cpu=power8 -save-temps" } */ maybe, I could use power7. Any comments? > +/* { dg-require-effective-target has_arch_ppc64 } */ > + > +/* { dg-final { scan-assembler-times {\mlis\M} 4 } } */ > +/* { dg-final { scan-assembler-times {\mori\M} 4 } } */ > +/* { dg-final { scan-assembler-times {\mrldimi\M} 2 } } */ > + > +void __attribute__ ((noinline)) foo (unsigned long long *a) > +{ > + /* 2 lis + 2 ori + 1 rldimi for each constant. */ > + *a++ = 0x800aabcdc167fa16ULL; > + *a++ = 0x7543a876867f616ULL; > +} > + > +long long A[] = {0x800aabcdc167fa16ULL, 0x7543a876867f616ULL}; > +int > +main () > +{ > + long long res[2]; > + > + foo (res); > + if (__builtin_memcmp (res, A, sizeof (res)) != 0) > + __builtin_abort (); > + > + return 0; > +}