From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id 394C33858D28; Mon, 12 Jun 2023 05:45:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 394C33858D28 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0353729.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35C5g0i0025483; Mon, 12 Jun 2023 05:44:56 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : in-reply-to : references : date : message-id : content-type : mime-version; s=pp1; bh=EOriHeaXQFsDzPA9euMsF5akibmZ9dEmVJYcHvQRXtE=; b=mwCbqAqw21d3FbdB/kHvazi4jMzfSM0WRqANXbihH1oZuPlvELCRCp1crc794r30Q2Pb CaW+6o/30MJ90nylv4bDe/t+NJG2ZxB9UddwiX9a16FXPu7yCgGpad22oU6/aRCymoLE prxa51HcKCkBdFZfeyDlmjlEQ9iAmlYqzxehHe8Dgy8NIzxxON1ob6oVlyPpFnR3roL/ QGJ+KtkbgXyRHQ3rwA0T57gHTsgetrwV6KFGnXFFwEnoV5ePRcbt+eOcjIXb+PX6pVak 0hgNKrx800FCDfdeEtJZeRN7U8X4wnTjqmovX8Jmk9o4lIKso0PFB9XKKg809biBWnY0 7Q== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3r5weng1b7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); 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Mon, 12 Jun 2023 05:44:53 GMT Received: from smtpav06.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4DDB158059; Mon, 12 Jun 2023 05:44:53 +0000 (GMT) Received: from smtpav06.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1ADEF5805D; Mon, 12 Jun 2023 05:44:53 +0000 (GMT) Received: from ltcden2-lp1.aus.stglabs.ibm.com (unknown [9.3.90.43]) by smtpav06.dal12v.mail.ibm.com (Postfix) with ESMTPS; Mon, 12 Jun 2023 05:44:53 +0000 (GMT) From: Jiufu Guo To: Richard Biener Cc: Richard Sandiford , gcc-patches@gcc.gnu.org, jeffreyalaw@gmail.com, segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org, bergner@linux.ibm.com Subject: Re: [PATCH] Make sure SCALAR_INT_MODE_P before invoke try_const_anchors In-Reply-To: (Richard Biener's message of "Fri, 9 Jun 2023 12:52:59 +0000 (UTC)") References: <20230609052847.2128612-1-guojiufu@linux.ibm.com> <56dbba43adda001d1668c29e8024c85d@linux.ibm.com> <7nwn0dgfvj.fsf@ltcden2-lp1.aus.stglabs.ibm.com> <7no7lohklj.fsf@ltcden2-lp1.aus.stglabs.ibm.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.1 (gnu/linux) Date: Mon, 12 Jun 2023 13:44:50 +0800 Message-ID: <7na5x5dyjx.fsf@ltcden2-lp1.aus.stglabs.ibm.com> Content-Type: text/plain X-TM-AS-GCONF: 00 X-Proofpoint-GUID: HSWhi36e7JHyR0Bw5YOrXDCGxmXuERST X-Proofpoint-ORIG-GUID: lekQfxKwcLndel1GWkWrSufNP7aS6ovm X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-12_02,2023-06-09_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 adultscore=0 mlxlogscore=999 spamscore=0 bulkscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 mlxscore=0 phishscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306120049 X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Richard Biener writes: > On Fri, 9 Jun 2023, Jiufu Guo wrote: > >> >> Hi, >> >> Richard Biener writes: >> >> > On Fri, 9 Jun 2023, Jiufu Guo wrote: >> > >> >> >> >> Hi, >> >> >> >> Richard Biener writes: >> >> >> >> > On Fri, 9 Jun 2023, Richard Sandiford wrote: >> >> > >> >> >> guojiufu writes: >> >> >> > Hi, >> >> >> > >> >> >> > On 2023-06-09 16:00, Richard Biener wrote: >> >> >> >> On Fri, 9 Jun 2023, Jiufu Guo wrote: >> >> >> >> >> >> >> >>> Hi, >> >> >> >>> >> ... >> >> >> >>> >> >> >> >>> This patch is raised when drafting below one. >> >> >> >>> https://gcc.gnu.org/pipermail/gcc-patches/2022-October/603530.html. >> >> >> >>> With that patch, "{[%1:DI]=0;} stack_tie" with BLKmode runs into >> >> >> >>> try_const_anchors, and hits the assert/ice. >> >> >> >>> >> >> >> >>> Boostrap and regtest pass on ppc64{,le} and x86_64. >> >> >> >>> Is this ok for trunk? >> >> >> >> >> >> >> >> Iff the correct fix at all (how can a CONST_INT have BLKmode?) then >> >> >> >> I suggest to instead fix try_const_anchors to change >> >> >> >> >> >> >> >> /* CONST_INT is used for CC modes, but we should leave those alone. >> >> >> >> */ >> >> >> >> if (GET_MODE_CLASS (mode) == MODE_CC) >> >> >> >> return NULL_RTX; >> >> >> >> >> >> >> >> gcc_assert (SCALAR_INT_MODE_P (mode)); >> >> >> >> >> >> >> >> to >> >> >> >> >> >> >> >> /* CONST_INT is used for CC modes, leave any non-scalar-int mode >> >> >> >> alone. */ >> >> >> >> if (!SCALAR_INT_MODE_P (mode)) >> >> >> >> return NULL_RTX; >> >> >> >> >> >> >> > >> >> >> > This is also able to fix this issue. there is a "Punt on CC modes" >> >> >> > patch >> >> >> > to return NULL_RTX in try_const_anchors. >> >> >> > >> >> >> >> but as said I wonder how we arrive at a BLKmode CONST_INT and whether >> >> >> >> we should have fended this off earlier. Can you share more complete >> >> >> >> RTL of that stack_tie? >> >> >> > >> >> >> > >> >> >> > (insn 15 14 16 3 (parallel [ >> >> >> > (set (mem/c:BLK (reg/f:DI 1 1) [1 A8]) >> >> >> > (const_int 0 [0])) >> >> >> > ]) "/home/guojiufu/temp/gdb.c":13:3 922 {stack_tie} >> >> >> > (nil)) >> >> >> > >> >> >> > It is "set (mem/c:BLK (reg/f:DI 1 1) (const_int 0 [0])". >> >> >> >> >> >> I'm not convinced this is correct RTL. (unspec:BLK [(const_int 0)] ...) >> >> >> would be though. It's arguably more accurate too, since the effect >> >> >> on the stack locations is unspecified rather than predictable. >> >> > >> >> > powerpc seems to be the only port with a stack_tie that's not >> >> > using an UNSPEC RHS. >> >> In rs6000.md, it is >> >> >> >> ; This is to explain that changes to the stack pointer should >> >> ; not be moved over loads from or stores to stack memory. >> >> (define_insn "stack_tie" >> >> [(match_parallel 0 "tie_operand" >> >> [(set (mem:BLK (reg 1)) (const_int 0))])] >> >> "" >> >> "" >> >> [(set_attr "length" "0")]) >> >> >> >> This would be just an placeholder insn, and acts as the comments. >> >> UNSPEC_ would works like other targets. While, I'm wondering >> >> the concerns on "set (mem:BLK (reg 1)) (const_int 0)". >> >> MODEs between SET_DEST and SET_SRC? >> > >> > I don't think the issue is the mode but the issue is that >> > the patter as-is says some memory is zeroed while that's not >> > actually true (not specifying a size means we can't really do >> > anything with this MEM, but still). Using an UNSPEC avoids >> > implying anything for the stored value. >> > >> > Of course I think a MEM SET_DEST without a specified size is bougs >> > as well, but there's larger precedent for this... >> >> Thanks for your kindly comments! >> Using "(set (mem:BLK (reg 1)) (const_int 0))" here, may because this >> insn does not generate real thing (not a real store and no asm code), >> may like barrier. >> >> While I agree that, using UNSPEC may be more clear to avoid mis-reading. > > Btw, another way to avoid the issue in CSE is to make it not process > (aka record anything for optimization) for SET from MEMs with > !MEM_SIZE_KNOWN_P Thanks! Yes, this would make sense. Then, there are two ideas(patches) to handle this issue: Which one would be preferable? This one (from compiling time aspect)? And maybe, the changes in rs6000 stack_tie through using unspec can be a standalone enhancement besides cse patch. Thanks for comments! BR, Jeff (Jiufu Guo) -------------------- patch 1 diff --git a/gcc/cse.cc b/gcc/cse.cc index 2bb63ac4105..06ecdadecbc 100644 --- a/gcc/cse.cc +++ b/gcc/cse.cc @@ -4271,6 +4271,8 @@ find_sets_in_insn (rtx_insn *insn, vec *psets) someplace else, so it isn't worth cse'ing. */ else if (GET_CODE (SET_SRC (x)) == CALL) ; + else if (MEM_P (SET_DEST (x)) && !MEM_SIZE_KNOWN_P (SET_DEST (x))) + ; else if (GET_CODE (SET_SRC (x)) == CONST_VECTOR && GET_MODE_CLASS (GET_MODE (SET_SRC (x))) != MODE_VECTOR_BOOL /* Prevent duplicates from being generated if the type is a V1 @@ -4314,6 +4316,8 @@ find_sets_in_insn (rtx_insn *insn, vec *psets) ; else if (GET_CODE (SET_SRC (y)) == CALL) ; + else if (MEM_P (SET_DEST (y)) && !MEM_SIZE_KNOWN_P (SET_DEST (y))) + ; else add_to_set (psets, y); } ----------------------------- -------------------patch 2 diff --git a/gcc/cse.cc b/gcc/cse.cc index 2bb63ac4105..ddb76fd281d 100644 --- a/gcc/cse.cc +++ b/gcc/cse.cc @@ -1312,11 +1312,10 @@ try_const_anchors (rtx src_const, machine_mode mode) rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX; unsigned lower_old, upper_old; - /* CONST_INT is used for CC modes, but we should leave those alone. */ - if (GET_MODE_CLASS (mode) == MODE_CC) + /* CONST_INT is used for CC/BLK modes, leave any non-scalar-int mode alone. */ + if (!SCALAR_INT_MODE_P (mode)) return NULL_RTX; - gcc_assert (SCALAR_INT_MODE_P (mode)); if (!compute_const_anchors (src_const, &lower_base, &lower_offs, &upper_base, &upper_offs)) return NULL_RTX; ------------- BR, Jeff (Jiufu Guo) > > Richard.