From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 552A63858D3C for ; Wed, 18 May 2022 02:40:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 552A63858D3C Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 24I2H88G021927; Wed, 18 May 2022 02:40:09 GMT Received: from pps.reinject (localhost [127.0.0.1]) by mx0b-001b2d01.pphosted.com (PPS) with ESMTPS id 3g4qvk8akd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 18 May 2022 02:40:09 +0000 Received: from m0098419.ppops.net (m0098419.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 24I2dWvf020069; Wed, 18 May 2022 02:40:09 GMT Received: from ppma02wdc.us.ibm.com (aa.5b.37a9.ip4.static.sl-reverse.com [169.55.91.170]) by mx0b-001b2d01.pphosted.com (PPS) with ESMTPS id 3g4qvk8ak5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 18 May 2022 02:40:08 +0000 Received: from pps.filterd (ppma02wdc.us.ibm.com [127.0.0.1]) by ppma02wdc.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 24I2XWdh019749; Wed, 18 May 2022 02:40:08 GMT Received: from b03cxnp07029.gho.boulder.ibm.com (b03cxnp07029.gho.boulder.ibm.com [9.17.130.16]) by ppma02wdc.us.ibm.com with ESMTP id 3g2429skv2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 18 May 2022 02:40:08 +0000 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp07029.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 24I2e7ec32178578 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 18 May 2022 02:40:07 GMT Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 86DA7BE04F; Wed, 18 May 2022 02:40:07 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 08929BE05B; Wed, 18 May 2022 02:40:07 +0000 (GMT) Received: from [9.160.179.82] (unknown [9.160.179.82]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP; Wed, 18 May 2022 02:40:06 +0000 (GMT) Message-ID: <84cbd15c-7cdc-3778-cacb-d76d2f92ca7c@linux.ibm.com> Date: Tue, 17 May 2022 21:40:06 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH v2] rs6000: Prefer assigning the MMA vector operands to altivec registers [PR105556] Content-Language: en-US To: Segher Boessenkool Cc: David Edelsohn , GCC Patches References: <90380588-1f25-3efb-376b-a9820fe3bd46@linux.ibm.com> <20220517234124.GB25951@gate.crashing.org> From: Peter Bergner In-Reply-To: <20220517234124.GB25951@gate.crashing.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: c_7M2SK9KqyTRA_oo-VyULQY_iChEiVc X-Proofpoint-ORIG-GUID: SkjyeDuHsxxnu1krrUEzNbXngtVYpuE- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-17_06,2022-05-17_02,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 suspectscore=0 mlxscore=0 impostorscore=0 mlxlogscore=822 lowpriorityscore=0 bulkscore=0 spamscore=0 priorityscore=1501 clxscore=1015 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205180012 X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, NICE_REPLY_A, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 18 May 2022 02:40:11 -0000 On 5/17/22 6:41 PM, Segher Boessenkool wrote: > On Mon, May 16, 2022 at 05:31:31PM -0500, Peter Bergner wrote: >> (define_insn "mma_" >> - [(set (match_operand:XO 0 "fpr_reg_operand" "=&d") >> - (unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "wa") >> - (match_operand:V16QI 2 "vsx_register_operand" "wa")] >> + [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") >> + (unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa") >> + (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")] > > You now have two "?" on alternative 1, instead of just one. This is the > same as if you had had > [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d") > (unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,??wa") > (match_operand:V16QI 2 "vsx_register_operand" "v,wa")] > The "?" are per alternative, not really per operand. It won't change > much here of course, just penalise more than you perhaps expected. Ak, ok. I think giving an extra penalty is fine here, since we really really want to use altivec regs here, so I went with the patch as is. Pushed. I'll wait a few days before backporting to GCC 12. As for GCC 11 & 10, I'll wait until someone actually has a test case that shows the same problem. I suspect a patch went into GCC 12 that changed the costs slightly and that's why we don't see the problem on the older branches. Thanks! Peter