Re: [PATCH v2] LoongArch: testsuite:Added additional vectorization "-mlsx" option.

[chenxiaolong <chenxiaolong@loongson.cn>]

At 21:13 +0800 on Saturday, 2024-01-13, Xi Ruoyao wrote：
> At 15:28 +0800 on Saturday 2024-01-13, chenxiaolong wrote：
> > gcc/testsuite/ChangeLog:
> > 
> > 	* gcc.dg/pr104992.c: Added additional "-mlsx" compilation
> > options.
> > 	* gcc.dg/signbit-2.c: Dito.
> > 	* gcc.dg/tree-ssa/scev-16.c: Dito.
> > 	* gfortran.dg/graphite/vect-pr40979.f90: Dito.
> > 	* gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.
> 
> I don't feel it right about the changes to pr104992.c and scev-16.c
> because no other architectures add special options there.  Why are we
> so special?
> 
> > ---
> >  gcc/testsuite/gcc.dg/pr104992.c                        | 1 +
> >  gcc/testsuite/gcc.dg/signbit-2.c                       | 1 +
> >  gcc/testsuite/gcc.dg/tree-ssa/scev-16.c                | 1 +
> >  gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90    | 1 +
> >  gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f | 1 +
> >  5 files changed, 5 insertions(+)
> > 
> > diff --git a/gcc/testsuite/gcc.dg/pr104992.c
> > b/gcc/testsuite/gcc.dg/pr104992.c
> > index 82f8c75559c..a77992fa491 100644
> > --- a/gcc/testsuite/gcc.dg/pr104992.c
> > +++ b/gcc/testsuite/gcc.dg/pr104992.c
> > @@ -1,6 +1,7 @@
> >  /* PR tree-optimization/104992 */
> >  /* { dg-do compile } */
> >  /* { dg-options "-O2 -Wno-psabi -fdump-tree-optimized" } */
> > +/* { dg-additional-options "-mlsx" { target loongarch_sx } } */
> >  
> >  #define vector __attribute__((vector_size(4*sizeof(int))))
> >  
> > diff --git a/gcc/testsuite/gcc.dg/signbit-2.c
> > b/gcc/testsuite/gcc.dg/signbit-2.c
> > index 62bb4047d74..5511bb78149 100644
> > --- a/gcc/testsuite/gcc.dg/signbit-2.c
> > +++ b/gcc/testsuite/gcc.dg/signbit-2.c
> > @@ -5,6 +5,7 @@
> >  /* { dg-additional-options "-msse2 -mno-avx512f" { target { i?86-
> > *-* x86_64-*-* } } } */
> >  /* { dg-additional-options "-march=armv8-a" { target aarch64_sve }
> > } */
> >  /* { dg-additional-options "-maltivec" { target powerpc_altivec_ok
> > } } */
> > +/* { dg-additional-options "-mlsx" { target loongarch_sx } } */
> >  /* { dg-skip-if "no fallback for MVE" { arm_mve } } */
> >  
> >  #include <stdint.h>
> > diff --git a/gcc/testsuite/gcc.dg/tree-ssa/scev-16.c
> > b/gcc/testsuite/gcc.dg/tree-ssa/scev-16.c
> > index 120f40c0b6c..06cfbbcfae5 100644
> > --- a/gcc/testsuite/gcc.dg/tree-ssa/scev-16.c
> > +++ b/gcc/testsuite/gcc.dg/tree-ssa/scev-16.c
> > @@ -1,6 +1,7 @@
> >  /* { dg-do compile } */
> >  /* { dg-require-effective-target vect_int } */
> >  /* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details" }
> > */
> > +/* { dg-additional-options "-mlsx" { target { loongarch*-*-* } } }
> > */
> >  
> >  int A[1024 * 2];
> >  
> > diff --git a/gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90
> > b/gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90
> > index a42290948c4..6f2ad1166a4 100644
> > --- a/gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90
> > +++ b/gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90
> > @@ -1,6 +1,7 @@
> >  ! { dg-do compile }
> >  ! { dg-require-effective-target vect_double }
> >  ! { dg-additional-options "-msse2" { target { { i?86-*-* x86_64-*-
> > * } && ilp32 } } }
> > +! { dg-additional-options "-mlsx" { target { loongarch*-*-* } } }
> >  
> >  module mqc_m
> >  integer, parameter, private :: longreal =
> > selected_real_kind(15,90)
> > diff --git a/gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f 
> > b/gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f
> > index 08965cc5e20..97b88821731 100644
> > --- a/gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f
> > +++ b/gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f
> > @@ -2,6 +2,7 @@
> >  ! { dg-require-effective-target vect_double }
> >  ! { dg-options "-O3 --param vect-max-peeling-for-alignment=0
> > -fpredictive-commoning -fdump-tree-pcom-details -std=legacy" }
> >  ! { dg-additional-options "-mprefer-avx128" { target { i?86-*-*
> > x86_64-*-* } } }
> > +! { dg-additional-options "-mlsx" { target { loongarch*-*-* } } }
> >  ! { dg-additional-options "-mzarch" { target { s390*-*-* } } }
> >  
> >  ******* RESID COMPUTES THE RESIDUAL:  R = V - AU

Because on the LoongArch architecture, GCC requires the addition of
vectorization options in order to generate vector code. Use the
check_effective_target_vect_cmdline_needed command in the lib/target-
supports.exp file to set whether the command line option is needed to
enable vectorizations. For example, ia64,x86,aarch64, and riscv
architectures, vectorization is enabled by default.