From: Richard Sandiford <richard.sandiford@linaro.org>
To: gcc-patches@gcc.gnu.org
Subject: [26/77] Use is_a <scalar_int_mode> in subreg/extract simplifications
Date: Thu, 13 Jul 2017 08:48:00 -0000 [thread overview]
Message-ID: <871spkk9it.fsf@linaro.org> (raw)
In-Reply-To: <8760ewohsv.fsf@linaro.org> (Richard Sandiford's message of "Thu, 13 Jul 2017 09:35:44 +0100")
This patch adds is_a <scalar_int_mode> checks to various places that
were optimising subregs or extractions in ways that only made sense
for scalar integers. Often the subreg transformations were looking
for extends, truncates or shifts and trying to remove the subreg, which
wouldn't be correct if the SUBREG_REG was a vector rather than a scalar.
The simplify_binary_operation_1 part also removes a redundant:
GET_MODE (opleft) == GET_MODE (XEXP (opright, 0))
since this must be true for:
(ior A (lshifrt B ...)) A == opleft, B == XEXP (opright, 0)
2017-07-13 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (find_split_point): Add is_a <scalar_int_mode> checks.
(make_compound_operation_int): Likewise.
(change_zero_ext): Likewise.
* expr.c (convert_move): Likewise.
(convert_modes): Likewise.
* fwprop.c (forward_propagate_subreg): Likewise.
* loop-iv.c (get_biv_step_1): Likewise.
* optabs.c (widen_operand): Likewise.
* postreload.c (move2add_valid_value_p): Likewise.
* recog.c (simplify_while_replacing): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_binary_operation_1): Likewise. Remove redundant
mode equality check.
Index: gcc/combine.c
===================================================================
--- gcc/combine.c 2017-07-13 09:18:34.533172436 +0100
+++ gcc/combine.c 2017-07-13 09:18:35.047126725 +0100
@@ -4793,7 +4793,7 @@ find_split_point (rtx *loc, rtx_insn *in
HOST_WIDE_INT pos = 0;
int unsignedp = 0;
rtx inner = NULL_RTX;
- scalar_int_mode inner_mode;
+ scalar_int_mode mode, inner_mode;
/* First special-case some codes. */
switch (code)
@@ -5047,7 +5047,9 @@ find_split_point (rtx *loc, rtx_insn *in
case SIGN_EXTRACT:
case ZERO_EXTRACT:
- if (CONST_INT_P (XEXP (SET_SRC (x), 1))
+ if (is_a <scalar_int_mode> (GET_MODE (XEXP (SET_SRC (x), 0)),
+ &inner_mode)
+ && CONST_INT_P (XEXP (SET_SRC (x), 1))
&& CONST_INT_P (XEXP (SET_SRC (x), 2)))
{
inner = XEXP (SET_SRC (x), 0);
@@ -5055,7 +5057,7 @@ find_split_point (rtx *loc, rtx_insn *in
pos = INTVAL (XEXP (SET_SRC (x), 2));
if (BITS_BIG_ENDIAN)
- pos = GET_MODE_PRECISION (GET_MODE (inner)) - len - pos;
+ pos = GET_MODE_PRECISION (inner_mode) - len - pos;
unsignedp = (code == ZERO_EXTRACT);
}
break;
@@ -5065,10 +5067,9 @@ find_split_point (rtx *loc, rtx_insn *in
}
if (len && pos >= 0
- && pos + len <= GET_MODE_PRECISION (GET_MODE (inner)))
+ && pos + len <= GET_MODE_PRECISION (GET_MODE (inner))
+ && is_a <scalar_int_mode> (GET_MODE (SET_SRC (x)), &mode))
{
- machine_mode mode = GET_MODE (SET_SRC (x));
-
/* For unsigned, we have a choice of a shift followed by an
AND or two shifts. Use two shifts for field sizes where the
constant might be too large. We assume here that we can
@@ -7859,6 +7860,7 @@ make_compound_operation_int (machine_mod
rtx new_rtx = 0;
int i;
rtx tem;
+ scalar_int_mode inner_mode;
bool equality_comparison = false;
if (in_code == EQ)
@@ -7967,11 +7969,12 @@ make_compound_operation_int (machine_mod
/* Same as previous, but for (subreg (lshiftrt ...)) in first op. */
else if (GET_CODE (XEXP (x, 0)) == SUBREG
&& subreg_lowpart_p (XEXP (x, 0))
+ && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG (XEXP (x, 0))),
+ &inner_mode)
&& GET_CODE (SUBREG_REG (XEXP (x, 0))) == LSHIFTRT
&& (i = exact_log2 (UINTVAL (XEXP (x, 1)) + 1)) >= 0)
{
rtx inner_x0 = SUBREG_REG (XEXP (x, 0));
- machine_mode inner_mode = GET_MODE (inner_x0);
new_rtx = make_compound_operation (XEXP (inner_x0, 0), next_code);
new_rtx = make_extraction (inner_mode, new_rtx, 0,
XEXP (inner_x0, 1),
@@ -8170,14 +8173,14 @@ make_compound_operation_int (machine_mod
/* If the SUBREG is masking of a logical right shift,
make an extraction. */
if (GET_CODE (inner) == LSHIFTRT
+ && is_a <scalar_int_mode> (GET_MODE (inner), &inner_mode)
+ && GET_MODE_SIZE (mode) < GET_MODE_SIZE (inner_mode)
&& CONST_INT_P (XEXP (inner, 1))
- && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (inner))
- && (UINTVAL (XEXP (inner, 1))
- < GET_MODE_PRECISION (GET_MODE (inner)))
+ && UINTVAL (XEXP (inner, 1)) < GET_MODE_PRECISION (inner_mode)
&& subreg_lowpart_p (x))
{
new_rtx = make_compound_operation (XEXP (inner, 0), next_code);
- int width = GET_MODE_PRECISION (GET_MODE (inner))
+ int width = GET_MODE_PRECISION (inner_mode)
- INTVAL (XEXP (inner, 1));
if (width > mode_width)
width = mode_width;
@@ -11380,15 +11383,16 @@ change_zero_ext (rtx pat)
maybe_swap_commutative_operands (**iter);
rtx *dst = &SET_DEST (pat);
+ scalar_int_mode mode;
if (GET_CODE (*dst) == ZERO_EXTRACT
&& REG_P (XEXP (*dst, 0))
+ && is_a <scalar_int_mode> (GET_MODE (XEXP (*dst, 0)), &mode)
&& CONST_INT_P (XEXP (*dst, 1))
&& CONST_INT_P (XEXP (*dst, 2)))
{
rtx reg = XEXP (*dst, 0);
int width = INTVAL (XEXP (*dst, 1));
int offset = INTVAL (XEXP (*dst, 2));
- machine_mode mode = GET_MODE (reg);
int reg_width = GET_MODE_PRECISION (mode);
if (BITS_BIG_ENDIAN)
offset = reg_width - width - offset;
Index: gcc/expr.c
===================================================================
--- gcc/expr.c 2017-07-13 09:18:31.697428505 +0100
+++ gcc/expr.c 2017-07-13 09:18:35.048126637 +0100
@@ -239,11 +239,14 @@ convert_move (rtx to, rtx from, int unsi
the required extension, strip it. We don't handle such SUBREGs as
TO here. */
- if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
+ scalar_int_mode to_int_mode;
+ if (GET_CODE (from) == SUBREG
+ && SUBREG_PROMOTED_VAR_P (from)
+ && is_a <scalar_int_mode> (to_mode, &to_int_mode)
&& (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
- >= GET_MODE_PRECISION (to_mode))
+ >= GET_MODE_PRECISION (to_int_mode))
&& SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp))
- from = gen_lowpart (to_mode, from), from_mode = to_mode;
+ from = gen_lowpart (to_int_mode, from), from_mode = to_int_mode;
gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
@@ -635,10 +638,12 @@ convert_modes (machine_mode mode, machin
/* If FROM is a SUBREG that indicates that we have already done at least
the required extension, strip it. */
- if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
- && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
+ if (GET_CODE (x) == SUBREG
+ && SUBREG_PROMOTED_VAR_P (x)
+ && is_a <scalar_int_mode> (mode, &int_mode)
+ && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (int_mode)
&& SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp))
- x = gen_lowpart (mode, SUBREG_REG (x));
+ x = gen_lowpart (int_mode, SUBREG_REG (x));
if (GET_MODE (x) != VOIDmode)
oldmode = GET_MODE (x);
Index: gcc/fwprop.c
===================================================================
--- gcc/fwprop.c 2017-04-18 19:52:33.713921172 +0100
+++ gcc/fwprop.c 2017-07-13 09:18:35.048126637 +0100
@@ -1096,6 +1096,7 @@ forward_propagate_subreg (df_ref use, rt
rtx use_reg = DF_REF_REG (use);
rtx_insn *use_insn;
rtx src;
+ scalar_int_mode int_use_mode, src_mode;
/* Only consider subregs... */
machine_mode use_mode = GET_MODE (use_reg);
@@ -1139,17 +1140,19 @@ forward_propagate_subreg (df_ref use, rt
definition of Y or, failing that, allow A to be deleted after
reload through register tying. Introducing more uses of Y
prevents both optimisations. */
- else if (subreg_lowpart_p (use_reg))
+ else if (is_a <scalar_int_mode> (use_mode, &int_use_mode)
+ && subreg_lowpart_p (use_reg))
{
use_insn = DF_REF_INSN (use);
src = SET_SRC (def_set);
if ((GET_CODE (src) == ZERO_EXTEND
|| GET_CODE (src) == SIGN_EXTEND)
+ && is_a <scalar_int_mode> (GET_MODE (src), &src_mode)
&& REG_P (XEXP (src, 0))
&& REGNO (XEXP (src, 0)) >= FIRST_PSEUDO_REGISTER
&& GET_MODE (XEXP (src, 0)) == use_mode
&& !free_load_extend (src, def_insn)
- && (targetm.mode_rep_extended (use_mode, GET_MODE (src))
+ && (targetm.mode_rep_extended (int_use_mode, src_mode)
!= (int) GET_CODE (src))
&& all_uses_available_at (def_insn, use_insn))
return try_fwprop_subst (use, DF_REF_LOC (use), XEXP (src, 0),
Index: gcc/loop-iv.c
===================================================================
--- gcc/loop-iv.c 2017-02-23 19:54:20.000000000 +0000
+++ gcc/loop-iv.c 2017-07-13 09:18:35.049126549 +0100
@@ -739,9 +739,9 @@ get_biv_step_1 (df_ref def, rtx reg,
if (GET_CODE (next) == SUBREG)
{
- machine_mode amode = GET_MODE (next);
-
- if (GET_MODE_SIZE (amode) > GET_MODE_SIZE (*inner_mode))
+ scalar_int_mode amode;
+ if (!is_a <scalar_int_mode> (GET_MODE (next), &amode)
+ || GET_MODE_SIZE (amode) > GET_MODE_SIZE (*inner_mode))
return false;
*inner_mode = amode;
Index: gcc/optabs.c
===================================================================
--- gcc/optabs.c 2017-07-13 09:18:32.526352886 +0100
+++ gcc/optabs.c 2017-07-13 09:18:35.049126549 +0100
@@ -195,6 +195,7 @@ widen_operand (rtx op, machine_mode mode
int unsignedp, int no_extend)
{
rtx result;
+ scalar_int_mode int_mode;
/* If we don't have to extend and this is a constant, return it. */
if (no_extend && GET_MODE (op) == VOIDmode)
@@ -204,19 +205,20 @@ widen_operand (rtx op, machine_mode mode
extend since it will be more efficient to do so unless the signedness of
a promoted object differs from our extension. */
if (! no_extend
+ || !is_a <scalar_int_mode> (mode, &int_mode)
|| (GET_CODE (op) == SUBREG && SUBREG_PROMOTED_VAR_P (op)
&& SUBREG_CHECK_PROMOTED_SIGN (op, unsignedp)))
return convert_modes (mode, oldmode, op, unsignedp);
/* If MODE is no wider than a single word, we return a lowpart or paradoxical
SUBREG. */
- if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
- return gen_lowpart (mode, force_reg (GET_MODE (op), op));
+ if (GET_MODE_SIZE (int_mode) <= UNITS_PER_WORD)
+ return gen_lowpart (int_mode, force_reg (GET_MODE (op), op));
/* Otherwise, get an object of MODE, clobber it, and set the low-order
part to OP. */
- result = gen_reg_rtx (mode);
+ result = gen_reg_rtx (int_mode);
emit_clobber (result);
emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
return result;
Index: gcc/postreload.c
===================================================================
--- gcc/postreload.c 2017-07-13 09:18:32.527352795 +0100
+++ gcc/postreload.c 2017-07-13 09:18:35.050126461 +0100
@@ -1699,14 +1699,16 @@ move2add_valid_value_p (int regno, machi
if (mode != reg_mode[regno])
{
- if (!MODES_OK_FOR_MOVE2ADD (mode, reg_mode[regno]))
+ scalar_int_mode old_mode;
+ if (!is_a <scalar_int_mode> (reg_mode[regno], &old_mode)
+ || !MODES_OK_FOR_MOVE2ADD (mode, old_mode))
return false;
/* The value loaded into regno in reg_mode[regno] is also valid in
mode after truncation only if (REG:mode regno) is the lowpart of
(REG:reg_mode[regno] regno). Now, for big endian, the starting
regno of the lowpart might be different. */
- int s_off = subreg_lowpart_offset (mode, reg_mode[regno]);
- s_off = subreg_regno_offset (regno, reg_mode[regno], s_off, mode);
+ int s_off = subreg_lowpart_offset (mode, old_mode);
+ s_off = subreg_regno_offset (regno, old_mode, s_off, mode);
if (s_off != 0)
/* We could in principle adjust regno, check reg_mode[regno] to be
BLKmode, and return s_off to the caller (vs. -1 for failure),
Index: gcc/recog.c
===================================================================
--- gcc/recog.c 2017-06-30 12:50:38.299660094 +0100
+++ gcc/recog.c 2017-07-13 09:18:35.050126461 +0100
@@ -560,6 +560,7 @@ simplify_while_replacing (rtx *loc, rtx
rtx x = *loc;
enum rtx_code code = GET_CODE (x);
rtx new_rtx = NULL_RTX;
+ scalar_int_mode is_mode;
if (SWAPPABLE_OPERANDS_P (x)
&& swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)))
@@ -655,6 +656,7 @@ simplify_while_replacing (rtx *loc, rtx
happen, we might just fail in some cases). */
if (MEM_P (XEXP (x, 0))
+ && is_a <scalar_int_mode> (GET_MODE (XEXP (x, 0)), &is_mode)
&& CONST_INT_P (XEXP (x, 1))
&& CONST_INT_P (XEXP (x, 2))
&& !mode_dependent_address_p (XEXP (XEXP (x, 0), 0),
@@ -662,7 +664,6 @@ simplify_while_replacing (rtx *loc, rtx
&& !MEM_VOLATILE_P (XEXP (x, 0)))
{
machine_mode wanted_mode = VOIDmode;
- machine_mode is_mode = GET_MODE (XEXP (x, 0));
int pos = INTVAL (XEXP (x, 2));
if (GET_CODE (x) == ZERO_EXTRACT && targetm.have_extzv ())
Index: gcc/simplify-rtx.c
===================================================================
--- gcc/simplify-rtx.c 2017-07-13 09:18:34.534172347 +0100
+++ gcc/simplify-rtx.c 2017-07-13 09:18:35.051126373 +0100
@@ -916,7 +916,7 @@ simplify_unary_operation_1 (enum rtx_cod
{
enum rtx_code reversed;
rtx temp;
- scalar_int_mode inner, int_mode;
+ scalar_int_mode inner, int_mode, op0_mode;
switch (code)
{
@@ -1628,21 +1628,19 @@ simplify_unary_operation_1 (enum rtx_cod
(zero_extend:SI (subreg:QI (and:SI (reg:SI) (const_int 63)) 0)) is
(and:SI (reg:SI) (const_int 63)). */
if (GET_CODE (op) == SUBREG
- && GET_MODE_PRECISION (GET_MODE (op))
- < GET_MODE_PRECISION (GET_MODE (SUBREG_REG (op)))
- && GET_MODE_PRECISION (GET_MODE (SUBREG_REG (op)))
- <= HOST_BITS_PER_WIDE_INT
- && GET_MODE_PRECISION (mode)
- >= GET_MODE_PRECISION (GET_MODE (SUBREG_REG (op)))
+ && is_a <scalar_int_mode> (mode, &int_mode)
+ && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG (op)), &op0_mode)
+ && GET_MODE_PRECISION (GET_MODE (op)) < GET_MODE_PRECISION (op0_mode)
+ && GET_MODE_PRECISION (op0_mode) <= HOST_BITS_PER_WIDE_INT
+ && GET_MODE_PRECISION (int_mode) >= GET_MODE_PRECISION (op0_mode)
&& subreg_lowpart_p (op)
- && (nonzero_bits (SUBREG_REG (op), GET_MODE (SUBREG_REG (op)))
+ && (nonzero_bits (SUBREG_REG (op), op0_mode)
& ~GET_MODE_MASK (GET_MODE (op))) == 0)
{
- if (GET_MODE_PRECISION (mode)
- == GET_MODE_PRECISION (GET_MODE (SUBREG_REG (op))))
+ if (GET_MODE_PRECISION (int_mode) == GET_MODE_PRECISION (op0_mode))
return SUBREG_REG (op);
- return simplify_gen_unary (ZERO_EXTEND, mode, SUBREG_REG (op),
- GET_MODE (SUBREG_REG (op)));
+ return simplify_gen_unary (ZERO_EXTEND, int_mode, SUBREG_REG (op),
+ op0_mode);
}
#if defined(POINTERS_EXTEND_UNSIGNED)
@@ -2707,21 +2705,23 @@ simplify_binary_operation_1 (enum rtx_co
by simplify_shift_const. */
if (GET_CODE (opleft) == SUBREG
+ && is_a <scalar_int_mode> (mode, &int_mode)
+ && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG (opleft)),
+ &inner_mode)
&& GET_CODE (SUBREG_REG (opleft)) == ASHIFT
&& GET_CODE (opright) == LSHIFTRT
&& GET_CODE (XEXP (opright, 0)) == SUBREG
- && GET_MODE (opleft) == GET_MODE (XEXP (opright, 0))
&& SUBREG_BYTE (opleft) == SUBREG_BYTE (XEXP (opright, 0))
- && (GET_MODE_SIZE (GET_MODE (opleft))
- < GET_MODE_SIZE (GET_MODE (SUBREG_REG (opleft))))
+ && GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (inner_mode)
&& rtx_equal_p (XEXP (SUBREG_REG (opleft), 0),
SUBREG_REG (XEXP (opright, 0)))
&& CONST_INT_P (XEXP (SUBREG_REG (opleft), 1))
&& CONST_INT_P (XEXP (opright, 1))
- && (INTVAL (XEXP (SUBREG_REG (opleft), 1)) + INTVAL (XEXP (opright, 1))
- == GET_MODE_PRECISION (mode)))
- return gen_rtx_ROTATE (mode, XEXP (opright, 0),
- XEXP (SUBREG_REG (opleft), 1));
+ && (INTVAL (XEXP (SUBREG_REG (opleft), 1))
+ + INTVAL (XEXP (opright, 1))
+ == GET_MODE_PRECISION (int_mode)))
+ return gen_rtx_ROTATE (int_mode, XEXP (opright, 0),
+ XEXP (SUBREG_REG (opleft), 1));
/* If we have (ior (and (X C1) C2)), simplify this by making
C1 as small as possible if C1 actually changes. */
next prev parent reply other threads:[~2017-07-13 8:48 UTC|newest]
Thread overview: 175+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-13 8:35 [00/77] Add wrapper classes for machine_modes Richard Sandiford
2017-07-13 8:36 ` [01/77] Add an E_ prefix to mode names Richard Sandiford
2017-08-11 16:56 ` Jeff Law
2017-07-13 8:38 ` [02/77] Add an E_ prefix to mode names and update case statements Richard Sandiford
2017-08-11 17:01 ` Jeff Law
2017-07-13 8:38 ` [03/77] Allow machine modes to be classes Richard Sandiford
2017-08-11 17:02 ` Jeff Law
2017-07-13 8:39 ` [04/77] Add FOR_EACH iterators for modes Richard Sandiford
2017-08-11 17:30 ` Jeff Law
2017-08-11 17:51 ` Richard Sandiford
2017-08-11 17:57 ` Jeff Law
2017-08-11 18:09 ` Jeff Law
2017-07-13 8:39 ` [05/77] Small tweak to array_value_type Richard Sandiford
2017-08-11 17:50 ` Jeff Law
2017-07-13 8:40 ` [07/77] Add scalar_float_mode Richard Sandiford
2017-08-11 18:12 ` Jeff Law
2017-07-13 8:40 ` [06/77] Make GET_MODE_WIDER return an opt_mode Richard Sandiford
2017-08-11 18:11 ` Jeff Law
2017-08-11 19:38 ` Richard Sandiford
2017-08-28 18:35 ` Jeff Law
2017-08-28 19:13 ` Richard Sandiford
2017-08-28 20:56 ` Jeff Law
2017-08-29 15:29 ` Richard Sandiford
2017-08-29 15:42 ` Jeff Law
2017-08-29 15:53 ` Richard Sandiford
2017-08-29 16:10 ` Jeff Law
2017-07-13 8:41 ` [09/77] Add SCALAR_FLOAT_TYPE_MODE Richard Sandiford
2017-08-11 18:16 ` Jeff Law
2017-07-13 8:41 ` [08/77] Simplify gen_trunc/extend_conv_libfunc Richard Sandiford
2017-08-11 18:13 ` Jeff Law
2017-07-13 8:42 ` [12/77] Use opt_scalar_float_mode when iterating over float modes Richard Sandiford
2017-08-11 19:14 ` Jeff Law
2017-07-13 8:42 ` [11/77] Add a float_mode_for_size helper function Richard Sandiford
2017-08-11 18:19 ` Jeff Law
2017-07-13 8:42 ` [10/77] Make assemble_real take a scalar_float_mode Richard Sandiford
2017-08-11 18:16 ` Jeff Law
2017-07-13 8:43 ` [14/77] Make libgcc_floating_mode_supported_p " Richard Sandiford
2017-08-11 19:21 ` Jeff Law
2017-07-13 8:43 ` [13/77] Make floatn_mode return an opt_scalar_float_mode Richard Sandiford
2017-08-11 18:25 ` Jeff Law
2017-07-13 8:44 ` [16/77] Add scalar_int_mode_pod Richard Sandiford
2017-08-14 18:40 ` Jeff Law
2017-07-13 8:44 ` [15/77] Add scalar_int_mode Richard Sandiford
2017-08-14 18:38 ` Jeff Law
2017-07-13 8:44 ` [17/77] Add an int_mode_for_size helper function Richard Sandiford
2017-08-14 18:51 ` Jeff Law
2017-07-13 8:45 ` [19/77] Add a smallest_int_mode_for_size " Richard Sandiford
2017-08-14 19:29 ` Jeff Law
2017-07-13 8:45 ` [18/77] Make int_mode_for_mode return an opt_scalar_int_mode Richard Sandiford
2017-08-14 19:16 ` Jeff Law
2017-07-13 8:46 ` [20/77] Replace MODE_INT checks with is_int_mode Richard Sandiford
2017-08-14 19:32 ` Jeff Law
2017-07-13 8:46 ` [21/77] Replace SCALAR_INT_MODE_P checks with is_a <scalar_int_mode> Richard Sandiford
2017-08-14 20:21 ` Jeff Law
2017-07-13 8:46 ` [22/77] Replace !VECTOR_MODE_P " Richard Sandiford
2017-08-14 19:35 ` Jeff Law
2017-07-13 8:47 ` [24/77] Replace a != BLKmode check " Richard Sandiford
2017-08-14 19:50 ` Jeff Law
2017-07-13 8:47 ` [23/77] Replace != VOIDmode checks " Richard Sandiford
2017-08-14 19:50 ` Jeff Law
2017-07-13 8:48 ` Richard Sandiford [this message]
2017-08-15 18:19 ` [26/77] Use is_a <scalar_int_mode> in subreg/extract simplifications Jeff Law
2017-07-13 8:48 ` [25/77] Use is_a <scalar_int_mode> for bitmask optimisations Richard Sandiford
2017-08-14 20:06 ` Jeff Law
2017-07-13 8:48 ` [27/77] Use is_a <scalar_int_mode> before LOAD_EXTEND_OP Richard Sandiford
2017-08-14 20:47 ` Jeff Law
2017-07-13 8:49 ` [29/77] Make some *_loc_descriptor helpers take scalar_int_mode Richard Sandiford
2017-08-14 20:47 ` Jeff Law
2017-07-13 8:49 ` [30/77] Use scalar_int_mode for doubleword splits Richard Sandiford
2017-08-14 21:28 ` Jeff Law
2017-07-13 8:49 ` [28/77] Use is_a <scalar_int_mode> for miscellaneous types of test Richard Sandiford
2017-08-15 19:23 ` Jeff Law
2017-07-13 8:50 ` [32/77] Check is_a <scalar_int_mode> before calling valid_pointer_mode Richard Sandiford
2017-08-14 21:37 ` Jeff Law
2017-07-13 8:50 ` [33/77] Add a NARROWEST_INT_MODE macro Richard Sandiford
2017-08-14 23:46 ` Jeff Law
2017-07-13 8:50 ` [31/77] Use scalar_int_mode for move2add Richard Sandiford
2017-08-15 21:16 ` Jeff Law
2017-07-13 8:51 ` [34/77] Add a SCALAR_INT_TYPE_MODE macro Richard Sandiford
2017-08-15 21:19 ` Jeff Law
2017-07-13 8:51 ` [36/77] Use scalar_int_mode in the RTL iv routines Richard Sandiford
2017-08-16 17:27 ` Jeff Law
2017-07-13 8:51 ` [37/77] Use scalar_int_mode when emitting cstores Richard Sandiford
2017-08-15 23:29 ` Jeff Law
2017-07-13 8:51 ` [35/77] Add uses of as_a <scalar_int_mode> Richard Sandiford
2017-08-15 22:35 ` Jeff Law
2017-07-13 8:52 ` [38/77] Move SCALAR_INT_MODE_P out of strict_volatile_bitfield_p Richard Sandiford
2017-08-15 23:50 ` Jeff Law
2017-07-13 8:52 ` [39/77] Two changes to the get_best_mode interface Richard Sandiford
2017-08-16 17:50 ` Jeff Law
2017-07-13 8:52 ` [40/77] Use scalar_int_mode for extraction_insn fields Richard Sandiford
2017-08-16 18:25 ` Jeff Law
2017-07-13 8:53 ` [41/77] Split scalar integer handling out of force_to_mode Richard Sandiford
2017-08-16 18:29 ` Jeff Law
2017-07-13 8:53 ` [42/77] Use scalar_int_mode in simplify_shift_const_1 Richard Sandiford
2017-08-16 18:46 ` Jeff Law
2017-07-13 8:54 ` [46/77] Make widest_int_mode_for_size return a scalar_int_mode Richard Sandiford
2017-08-24 6:15 ` Jeff Law
2017-07-13 8:54 ` [45/77] Make extract_left_shift take " Richard Sandiford
2017-08-24 4:30 ` Jeff Law
2017-07-13 8:54 ` [43/77] Use scalar_int_mode in simplify_comparison Richard Sandiford
2017-08-24 4:29 ` Jeff Law
2017-07-13 8:54 ` [44/77] Make simplify_and_const_int take a scalar_int_mode Richard Sandiford
2017-08-24 4:29 ` Jeff Law
2017-07-13 8:55 ` [49/77] Simplify nonzero/num_sign_bits hooks Richard Sandiford
2017-08-24 9:19 ` Jeff Law
2017-07-13 8:55 ` [47/77] Make subroutines of nonzero_bits operate on scalar_int_mode Richard Sandiford
2017-08-24 6:59 ` Jeff Law
2017-07-13 8:55 ` [48/77] Make subroutines of num_sign_bit_copies " Richard Sandiford
2017-08-24 9:19 ` Jeff Law
2017-07-13 8:56 ` [51/77] Use opt_scalar_int_mode when iterating over integer modes Richard Sandiford
2017-08-24 17:28 ` Jeff Law
2017-07-13 8:56 ` [52/77] Use scalar_int_mode in extract/store_bit_field Richard Sandiford
2017-08-24 18:21 ` Jeff Law
2017-07-13 8:56 ` [50/77] Add helper routines for SUBREG_PROMOTED_VAR_P subregs Richard Sandiford
2017-08-24 6:17 ` Jeff Law
2017-07-13 8:57 ` [54/77] Add explicit int checks for alternative optab implementations Richard Sandiford
2017-08-24 21:35 ` Jeff Law
2017-07-13 8:57 ` [53/77] Pass a mode to const_scalar_mask_from_tree Richard Sandiford
2017-08-24 6:21 ` Jeff Law
2017-07-13 8:58 ` [57/77] Use scalar_int_mode in expand_expr_addr_expr Richard Sandiford
2017-08-24 21:36 ` Jeff Law
2017-07-13 8:58 ` [55/77] Use scalar_int_mode in simplify_const_unary_operation Richard Sandiford
2017-08-24 21:35 ` Jeff Law
2017-07-13 8:58 ` [56/77] Use the more specific type when two modes are known to be equal Richard Sandiford
2017-08-24 6:22 ` Jeff Law
2017-07-13 8:59 ` [60/77] Pass scalar_int_modes to do_jump_by_parts_* Richard Sandiford
2017-08-24 21:52 ` Jeff Law
2017-07-13 8:59 ` [58/77] Use scalar_int_mode in a try_combine optimisation Richard Sandiford
2017-08-24 21:37 ` Jeff Law
2017-07-13 8:59 ` [59/77] Add a rtx_jump_table_data::get_data_mode helper Richard Sandiford
2017-08-24 21:39 ` Jeff Law
2017-07-13 9:00 ` [61/77] Use scalar_int_mode in the AArch64 port Richard Sandiford
2017-08-24 21:56 ` Jeff Law
2017-09-05 8:49 ` James Greenhalgh
2017-07-13 9:01 ` [64/77] Add a scalar_mode class Richard Sandiford
2017-08-25 5:03 ` Jeff Law
2017-07-13 9:01 ` [62/77] Big machine_mode to scalar_int_mode replacement Richard Sandiford
2017-08-24 21:57 ` Jeff Law
2017-07-13 9:01 ` [63/77] Simplifications after type switch Richard Sandiford
2017-08-24 22:09 ` Jeff Law
2017-07-13 9:02 ` [67/77] Use scalar_mode in fixed-value.* Richard Sandiford
2017-08-25 8:15 ` Jeff Law
2017-07-13 9:02 ` [66/77] Use scalar_mode for constant integers Richard Sandiford
2017-08-25 5:05 ` Jeff Law
2017-08-30 12:56 ` Richard Sandiford
2017-07-13 9:02 ` [65/77] Add a SCALAR_TYPE_MODE macro Richard Sandiford
2017-08-25 5:04 ` Jeff Law
2017-07-13 9:02 ` [68/77] Use scalar_mode for is_int_mode/is_float_mode pairs Richard Sandiford
2017-08-25 6:19 ` Jeff Law
2017-07-13 9:03 ` [71/77] Use opt_scalar_mode for mode iterators Richard Sandiford
2017-08-25 16:46 ` Jeff Law
2017-07-13 9:03 ` [70/77] Make expand_fix/float check for scalar modes Richard Sandiford
2017-08-25 8:53 ` Jeff Law
2017-07-13 9:03 ` [69/77] Split scalar-only part out of convert_mode Richard Sandiford
2017-08-25 8:21 ` Jeff Law
2017-07-13 9:04 ` [73/77] Pass scalar_mode to scalar_mode_supported_p Richard Sandiford
2017-08-25 16:46 ` Jeff Law
2017-07-13 9:04 ` [72/77] " Richard Sandiford
2017-08-25 16:46 ` Jeff Law
2017-07-13 9:05 ` [75/77] Use scalar_mode in the AArch64 port Richard Sandiford
2017-08-25 16:48 ` Jeff Law
2017-09-05 8:49 ` James Greenhalgh
2017-07-13 9:05 ` [77/77] Add a complex_mode class Richard Sandiford
2017-08-25 17:43 ` Jeff Law
2017-07-13 9:05 ` [74/77] Various small scalar_mode changes Richard Sandiford
2017-08-25 17:31 ` Jeff Law
2017-07-13 9:05 ` [76/77] Add a scalar_mode_pod class Richard Sandiford
2017-08-25 17:16 ` Jeff Law
2017-07-22 21:02 ` [00/77] Add wrapper classes for machine_modes Segher Boessenkool
2017-07-24 9:28 ` Richard Sandiford
2017-07-24 10:56 ` Segher Boessenkool
2017-07-24 12:53 ` Richard Sandiford
2017-07-24 13:42 ` Segher Boessenkool
2017-07-24 18:31 ` Richard Biener
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